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From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Clément Le Goffic" <legoffic.clement@gmail.com>,
	"Rob Herring" <robh@kernel.org>,
	"Clément Le Goffic" <clement.legoffic@foss.st.com>
Cc: Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Jonathan Corbet <corbet@lwn.net>,
	Gatien Chevallier <gatien.chevallier@foss.st.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Gabriel Fernandez <gabriel.fernandez@foss.st.com>,
	Julius Werner <jwerner@chromium.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, devicetree@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-clk@vger.kernel.org
Subject: Re: [PATCH v5 06/20] dt-bindings: memory: introduce DDR4
Date: Sun, 17 Aug 2025 09:19:04 +0200	[thread overview]
Message-ID: <fb5083ff-4bee-4a0f-8774-54b492cd9a6d@kernel.org> (raw)
In-Reply-To: <da8578ae-3f79-4082-b0fb-760553004c93@gmail.com>

On 14/08/2025 16:42, Clément Le Goffic wrote:
> Hi Rob,
> 
> On 30/07/2025 23:11, Rob Herring wrote:
>> On Mon, Jul 28, 2025 at 05:29:37PM +0200, Clément Le Goffic wrote:
>>> Introduce JEDEC compliant DDR bindings, that use new memory-props binding.
>>>
>>> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
>>> ---
>>>   .../memory-controllers/ddr/jedec,ddr4.yaml         | 34 ++++++++++++++++++++++
>>>   1 file changed, 34 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml
>>> new file mode 100644
>>> index 000000000000..f457066a2f8b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml
>>> @@ -0,0 +1,34 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,ddr4.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: DDR3 SDRAM compliant to JEDEC JESD79-4D
>>> +
>>> +maintainers:
>>> +  - Krzysztof Kozlowski <krzk@kernel.org>
>>> +
>>> +allOf:
>>> +  - $ref: jedec,sdram-props.yaml#
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - pattern: "^ddr4-[0-9a-f]{2},[0-9a-f]{1}$"
>>
>> Shouldn't this be 'jedec,ddr4-...'
> 
> That's not the case for lpddr bindings, I wanted both lpddr and ddr 
> bindings to be similar but this can change.

For LPDDR Julius introduced in commit 686fe63b2280 ("dt-bindings:
memory: Add numeric LPDDR compatible string variant") ddr4-VENDORID
pattern to distinguish individual manufacturers.

Jedec is not really the vendor here.

Is it the same case in DDR? You have a defined list of vendor IDs (also
1 byte)?

> 
>>
>>> +      - const: jedec,ddr4


Best regards,
Krzysztof

  reply	other threads:[~2025-08-17  7:19 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-28 15:29 [PATCH v5 00/20] Introduce STM32 DDR PMU for STM32MP platforms Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 01/20] bus: firewall: move stm32_firewall header file in include folder Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 02/20] dt-bindings: stm32: stm32mp25: add `#access-controller-cells` property Clément Le Goffic
2025-07-31 13:50   ` Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 03/20] clk: stm32mp25: add firewall grant_access ops Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 04/20] arm64: dts: st: set rcc as an access-controller Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 05/20] dt-bindings: memory: factorise LPDDR props into SDRAM props Clément Le Goffic
2025-07-30 18:27   ` Julius Werner
2025-08-14 14:06     ` Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 06/20] dt-bindings: memory: introduce DDR4 Clément Le Goffic
2025-07-30 18:29   ` Julius Werner
2025-08-14 14:40     ` Clément Le Goffic
2025-07-30 21:11   ` Rob Herring
2025-08-14 14:42     ` Clément Le Goffic
2025-08-17  7:19       ` Krzysztof Kozlowski [this message]
2025-08-22 13:59         ` Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 07/20] dt-bindings: memory: factorise LPDDR channel binding into SDRAM channel Clément Le Goffic
2025-07-31 13:52   ` Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 08/20] dt-binding: memory: add DDR4 channel compatible Clément Le Goffic
2025-07-31 13:52   ` Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 09/20] dt-bindings: memory: SDRAM channel: standardise node name Clément Le Goffic
2025-07-31 13:53   ` Rob Herring (Arm)
2025-07-28 15:29 ` [PATCH v5 10/20] arm64: dts: st: add LPDDR channel to stm32mp257f-dk board Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 11/20] arm64: dts: st: add DDR channel to stm32mp257f-ev1 board Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 12/20] dt-bindings: perf: stm32: introduce DDRPERFM dt-bindings Clément Le Goffic
2025-07-31 13:54   ` Rob Herring
2025-07-28 15:29 ` [PATCH v5 13/20] perf: stm32: introduce DDRPERFM driver Clément Le Goffic
2025-07-30 14:43   ` kernel test robot
2025-07-28 15:29 ` [PATCH v5 14/20] Documentation: perf: stm32: add ddrperfm support Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 15/20] MAINTAINERS: add myself as STM32 DDR PMU maintainer Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 16/20] ARM: dts: stm32: add ddrperfm on stm32mp131 Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 17/20] ARM: dts: stm32: add ddrperfm on stm32mp151 Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 18/20] arm64: dts: st: add ddrperfm on stm32mp251 Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 19/20] arm64: dts: st: support ddrperfm on stm32mp257f-dk Clément Le Goffic
2025-07-28 15:29 ` [PATCH v5 20/20] arm64: dts: st: support ddrperfm on stm32mp257f-ev1 Clément Le Goffic

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