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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5d806fed723sm1638648a12.64.2024.12.20.02.07.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Dec 2024 02:07:06 -0800 (PST) Message-ID: Date: Fri, 20 Dec 2024 11:07:03 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 5/5] arm64: dts: qcom: Update IPQ9574 xo_board_clk to use fixed factor clock To: Jie Luo , Konrad Dybcio , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, quic_kkumarcs@quicinc.com, quic_suruchia@quicinc.com, quic_pavir@quicinc.com, quic_linchen@quicinc.com, quic_leiwei@quicinc.com, bartosz.golaszewski@linaro.org, srinivas.kandagatla@linaro.org References: <20241107-qcom_ipq_cmnpll-v6-0-a5cfe09de485@quicinc.com> <20241107-qcom_ipq_cmnpll-v6-5-a5cfe09de485@quicinc.com> <0776a26e-56cd-4838-9b52-210ae9a1f281@oss.qualcomm.com> <8063460d-18ad-4e54-8232-716bad9d37c3@quicinc.com> <2456ab36-f48e-4aa3-88e1-aeb7895c9816@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: knXvYNGZFRetVOGMkGilcjR5T_MESItC X-Proofpoint-GUID: knXvYNGZFRetVOGMkGilcjR5T_MESItC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=999 spamscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 clxscore=1015 suspectscore=0 bulkscore=0 priorityscore=1501 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412200082 On 20.12.2024 7:43 AM, Jie Luo wrote: > > > On 12/20/2024 5:28 AM, Konrad Dybcio wrote: >> On 18.12.2024 12:17 PM, Jie Luo wrote: >>> >>> >>> On 12/13/2024 6:30 PM, Jie Luo wrote: >>>> >>>> >>>> On 12/13/2024 2:33 AM, Konrad Dybcio wrote: >>>>> On 7.11.2024 10:50 AM, Luo Jie wrote: >>>>>> xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock >>>>>> 48 MHZ (also being the reference clock of CMN PLL) divided 2 by analog >>>>>> block routing channel. >>>>>> >>>>>> Signed-off-by: Luo Jie >>>>>> --- >>>>>>    arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 7 ++++++- >>>>>>    arch/arm64/boot/dts/qcom/ipq9574.dtsi            | 3 ++- >>>>>>    2 files changed, 8 insertions(+), 2 deletions(-) >>>>>> >>>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/ arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi >>>>>> index 78f6a2e053d5..9a8692377176 100644 >>>>>> --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi >>>>>> +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi >>>>>> @@ -174,8 +174,13 @@ &ref_48mhz_clk { >>>>>>        clock-mult = <1>; >>>>>>    }; >>>>>> +/* >>>>>> + * The frequency of xo_board_clk is fixed to 24 MHZ, which is routed >>>>>> + * from WiFi output clock 48 MHZ divided by 2. >>>>>> + */ >>>>>>    &xo_board_clk { >>>>>> -    clock-frequency = <24000000>; >>>>>> +    clock-div = <2>; >>>>>> +    clock-mult = <1>; >>>>>>    }; >>>>>>    &xo_clk { >>>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/ dts/qcom/ipq9574.dtsi >>>>>> index 8246a00a3e3e..25aed33e9358 100644 >>>>>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi >>>>>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi >>>>>> @@ -32,7 +32,8 @@ sleep_clk: sleep-clk { >>>>>>            }; >>>>>>            xo_board_clk: xo-board-clk { >>>>>> -            compatible = "fixed-clock"; >>>>>> +            compatible = "fixed-factor-clock"; >>>>>> +            clocks = <&ref_48mhz_clk>; >>>>> >>>>> This must be squashed with the previous patch, you can't introduce >>>>> code and replace it immediately afterwards. >>>>> >>>>> Konrad >>> >>> Hi Konrad, >>> >>> Looking at this comment again, there may have been some >>> misunderstanding. We are not introducing xo_board_clk in patch 4 of this >>> series. xo_board_clk is a pre-existing node. >>> >>> As part of this additional patch 5, we wanted to address Dmitry's >>> comment earlier in v5 (reference to comment below), by converting the >>> xo_board_clk as well to a fixed-factor clock. So it is better to keep >>> this change as a separate patch in my view. Hope this is OK. >> >> Oh okay.. >> >> What's the difference between xo_board_clk and xo_clk then, if the >> divider is accounted for in xo_board_clk? >> >> Konrad > > Here is the clock chain for the relationship between the clocks: > xo_clk (48 MHZ or 96 MHZ)-->WiFi (mul/div)--> 48 MHZ-->CMN PLL >                                | >                            +-->fixed factor(div by 2) --> xo_board_clk (24 MHZ) > > So there are two dividers (fixed factor clocks): first for generating > the 48 MHZ clock (ref-48mhz-clk) from the fixed clock source 'xo_clk', > and a second for generating the 24 MHZ 'xo_board_clk' from the 48 MHZ > ref clock. Ok, thanks for the explanation Reviewed-by: Konrad Dybcio Konrad