From: James Clark <james.clark@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Namhyung Kim <namhyung@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, will@kernel.org,
mark.rutland@arm.com, Catalin Marinas <catalin.marinas@arm.com>,
Jonathan Corbet <corbet@lwn.net>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 3/3] Documentation: arm64: Document the PMU event counting threshold feature
Date: Thu, 23 Nov 2023 15:33:16 +0000 [thread overview]
Message-ID: <fb8fd583-cd18-8383-dcca-b3d601a9ff7a@arm.com> (raw)
In-Reply-To: <0058ca82-e55b-4490-90d0-871afce787c7@arm.com>
On 21/11/2023 10:33, Suzuki K Poulose wrote:
> On 20/11/2023 21:31, Namhyung Kim wrote:
>> On Mon, Nov 13, 2023 at 3:26 AM James Clark <james.clark@arm.com> wrote:
>>>
>>> Add documentation for the new Perf event open parameters and
>>> the threshold_max capability file.
>>>
>>> Signed-off-by: James Clark <james.clark@arm.com>
>>> ---
>>> Documentation/arch/arm64/perf.rst | 56 +++++++++++++++++++++++++++++++
>>> 1 file changed, 56 insertions(+)
>>>
>>> diff --git a/Documentation/arch/arm64/perf.rst
>>> b/Documentation/arch/arm64/perf.rst
>>> index 1f87b57c2332..36b8111a710d 100644
>>> --- a/Documentation/arch/arm64/perf.rst
>>> +++ b/Documentation/arch/arm64/perf.rst
>>> @@ -164,3 +164,59 @@ and should be used to mask the upper bits as
>>> needed.
>>>
>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/perf/arch/arm64/tests/user-events.c
>>> .. _tools/lib/perf/tests/test-evsel.c:
>>>
>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/lib/perf/tests/test-evsel.c
>>> +
>>> +Event Counting Threshold
>>> +==========================================
>>> +
>>> +Overview
>>> +--------
>>> +
>>> +FEAT_PMUv3_TH (Armv8.8) permits a PMU counter to increment only on
>>> +events whose count meets a specified threshold condition. For
>>> example if
>>> +threshold_compare is set to 2 ('Greater than or equal'), and the
>>> +threshold is set to 2, then the PMU counter will now only increment by
>>> +when an event would have previously incremented the PMU counter by 2 or
>>> +more on a single processor cycle.
>>> +
>>> +To increment by 1 after passing the threshold condition instead of the
>>> +number of events on that cycle, add the 'threshold_count' option to the
>>> +commandline.
>>> +
>>> +How-to
>>> +------
>>> +
>>> +The threshold, threshold_compare and threshold_count values can be
>>> +provided per event:
>>> +
>>> +.. code-block:: sh
>>> +
>>> + perf stat -e stall_slot/threshold=2,threshold_compare=2/ \
>>> + -e
>>> dtlb_walk/threshold=10,threshold_compare=3,threshold_count/
>>
>> Can you please explain this a bit more?
>>
>> I guess the first event counts stall_slot PMU if the event if it's
>> greater than or equal to 2. And as threshold_count is not set,
>> it'd count the stall_slot as is. E.g. it counts 3 when it sees 3.
>>
>> OTOH, dtlb_walk will count 1 if it sees an event less than 10.
>> Is my understanding correct?
>
> That is correct. The behavior is described in the paragraph above.
> But I agree that it would be really helpful if we explained with the
> example above.
>
Yeah I can add a description of how the example behaves.
>>
>>> +
>>> +And the following comparison values are supported:
>>> +
>>> +.. code-block::
>>> +
>>> + 0: Not-equal
>>> + 1: Equals
>>> + 2: Greater-than-or-equal
>>> + 3: Less-than
>>
>> So the above values are for threashold_compare, right?
>> It'd be nice if it's more explicit.
Yep I agree, I can label this with threshold_compare.
>>
>> Similarly, it'd be helpful to have a description for the
>> threshold and threshold_count fields.
>
> Agreed.
>
> Suzuki
>
Yeah I'll add explicit descriptions for each field.
Thanks for the review.
>
>
>>
>> Thanks,
>> Namhyung
>>
>>> +
>>> +The maximum supported threshold value can be read from the caps of each
>>> +PMU, for example:
>>> +
>>> +.. code-block:: sh
>>> +
>>> + cat /sys/bus/event_source/devices/armv8_pmuv3/caps/threshold_max
>>> +
>>> + 0x000000ff
>>> +
>>> +If a value higher than this is given, then it will be silently clamped
>>> +to the maximum. The highest possible maximum is 4095, as the config
>>> +field for threshold is limited to 12 bits, and the Perf tool will
>>> refuse
>>> +to parse higher values.
>>> +
>>> +If the PMU doesn't support FEAT_PMUv3_TH, then threshold_max will read
>>> +0, and both threshold and threshold_compare will be silently ignored.
>>> +threshold_max will also read as 0 on aarch32 guests, even if the host
>>> +is running on hardware with the feature.
>>> --
>>> 2.34.1
>>>
>>>
>
>
next prev parent reply other threads:[~2023-11-23 15:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-13 11:25 [PATCH v5 0/3] arm64: perf: Add support for event counting threshold James Clark
2023-11-13 11:25 ` [PATCH v5 1/3] arm64: perf: Include threshold control fields in PMEVTYPER mask James Clark
2023-11-21 10:15 ` Suzuki K Poulose
2023-11-22 8:44 ` Anshuman Khandual
2023-11-13 11:25 ` [PATCH v5 2/3] arm64: perf: Add support for event counting threshold James Clark
2023-11-21 10:20 ` Suzuki K Poulose
2023-11-23 3:42 ` Anshuman Khandual
2023-11-23 17:53 ` James Clark
2023-11-13 11:25 ` [PATCH v5 3/3] Documentation: arm64: Document the PMU event counting threshold feature James Clark
2023-11-20 21:31 ` Namhyung Kim
2023-11-21 10:33 ` Suzuki K Poulose
2023-11-23 15:33 ` James Clark [this message]
2023-11-23 5:50 ` Anshuman Khandual
2023-11-23 15:45 ` James Clark
2023-11-24 9:52 ` James Clark
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