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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b24ddc0afbsm137964415ad.64.2026.03.31.23.55.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Mar 2026 23:55:38 -0700 (PDT) Message-ID: Date: Wed, 1 Apr 2026 14:55:32 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 17/38] drm/msm/dp: add support to send ACT packets for MST To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Abhinav Kumar References: <20250825-msm-dp-mst-v3-0-01faacfcdedd@oss.qualcomm.com> <20250825-msm-dp-mst-v3-17-01faacfcdedd@oss.qualcomm.com> <46d97aec-9f46-42bd-8725-2c236ffd13ba@oss.qualcomm.com> <4cb29e7a-9a75-4f8a-9036-c96e9190b7b0@oss.qualcomm.com> Content-Language: en-US From: Yongxing Mou In-Reply-To: <4cb29e7a-9a75-4f8a-9036-c96e9190b7b0@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAxMDA2MCBTYWx0ZWRfX0XqHTDgWT++Q uh1dJPXTuHY3ayErFbzAFcqXyV0ihBYOFpbPecwlg+9XJk5WG9HTNdcbCyPkBvqhG6TszQXWsBm UahWayYoUJ7T+DamqjvBi11n5MGxp/DCxJgY67bTPkvjLfW+7O6pBaMnsVYudbCHkmg5tPvltQ4 PHAIdbfNwqN5kjVD6kgg46jXRVAP6L8D4Iw7zxErwqp/9uacp1hE2u55pchKOcl5UDwRKitLbqx DhFaFIEycr1FKdOUsoSR0zKgrdC2Ol88QEgZaO81q234GSRTnnAK0KASnL3vvISm2lJbqHpJihT 8zj/ww7NqshEsEoRR4+rqMvhu5YuHv1pZ5j4MNC7xh/QWBkbiM6EeUBRnx9gNzOxav07Lq0ot/p PU5okrZBJZd8LQ25/9mK337SnZVNidvjPLm2OEPm/w+W1P83lhrlMbUqGtxTXKOcsLjWiV3GTJx PivnRDMNioygn9eJBIA== X-Authority-Analysis: v=2.4 cv=YcawJgRf c=1 sm=1 tr=0 ts=69ccc16c cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=FT7dueq81gZMvNQLzlUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: I3gYL75Ogn0Hw3UnO2AgPdu-8bM5h8Cu X-Proofpoint-ORIG-GUID: I3gYL75Ogn0Hw3UnO2AgPdu-8bM5h8Cu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-01_02,2026-03-31_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 adultscore=0 clxscore=1015 suspectscore=0 malwarescore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604010060 On 4/1/2026 2:47 PM, Dmitry Baryshkov wrote: > On 01/04/2026 09:44, Yongxing Mou wrote: >> >> >> On 8/26/2025 5:10 AM, Dmitry Baryshkov wrote: >>> On Mon, Aug 25, 2025 at 10:16:03PM +0800, Yongxing Mou wrote: >>>> From: Abhinav Kumar >>>> >>>> Whenever virtual channel slot allocation changes, the DP >>>> source must send the action control trigger sequence to notify >>>> the sink about the same. This would be applicable during the >>>> start and stop of the pixel stream. Add the infrastructure >>>> to be able to send ACT packets for the DP controller when >>>> operating in MST mode. >>>> >>>> Signed-off-by: Abhinav Kumar >>>> Signed-off-by: Yongxing Mou >>>> --- >>>>   drivers/gpu/drm/msm/dp/dp_ctrl.c    | 39 +++++++++++++++++++++++++ >>>> + +++++++++-- >>>>   drivers/gpu/drm/msm/dp/dp_ctrl.h    |  4 ++-- >>>>   drivers/gpu/drm/msm/dp/dp_display.c |  3 ++- >>>>   drivers/gpu/drm/msm/dp/dp_display.h |  1 + >>>>   drivers/gpu/drm/msm/dp/dp_reg.h     |  2 ++ >>>>   5 files changed, 44 insertions(+), 5 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/ >>>> dp/dp_ctrl.c >>>> index >>>> 608a1a077301b2ef3c77c271d873bb4364abe779..16e5ed58e791971d5dca3077cbb77bfcc186505a 100644 >>>> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c >>>> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c >>>> @@ -142,6 +142,7 @@ struct msm_dp_ctrl_private { >>>>       bool core_clks_on; >>>>       bool link_clks_on; >>>>       bool stream_clks_on[DP_STREAM_MAX]; >>>> +    bool mst_active; >>>>   }; >>>>   static inline u32 msm_dp_read_ahb(const struct msm_dp_ctrl_private >>>> *ctrl, u32 offset) >>>> @@ -227,6 +228,32 @@ static int msm_dp_aux_link_configure(struct >>>> drm_dp_aux *aux, >>>>       return 0; >>>>   } >>>> +void msm_dp_ctrl_mst_send_act(struct msm_dp_ctrl *msm_dp_ctrl) >>>> +{ >>>> +    struct msm_dp_ctrl_private *ctrl; >>>> +    bool act_complete; >>>> + >>>> +    ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, >>>> msm_dp_ctrl); >>>> + >>>> +    if (!ctrl->mst_active) >>>> +        return; >>>> + >>>> +    msm_dp_write_link(ctrl, REG_DP_MST_ACT, 0x1); >>>> +    /* make sure ACT signal is performed */ >>>> +    wmb(); >>>> + >>>> +    msleep(20); /* needs 1 frame time */ >>>> + >>>> +    act_complete = msm_dp_read_link(ctrl, REG_DP_MST_ACT); >>>> + >>>> +    if (!act_complete) >>>> +        drm_dbg_dp(ctrl->drm_dev, "mst ACT trigger complete >>>> SUCCESS\n"); >>>> +    else >>>> +        drm_dbg_dp(ctrl->drm_dev, "mst ACT trigger complete >>>> failed\n"); >>> >>> Shouldn't it return an error if the register dind't latch? Also, >>> shouldn't we set mst_active only if the write went through? >>> >> In some cases, MST still works correctly even when the ACT trigger >> fails; here refer to the downstream implementation. > > I don't think it is a good idea. It would be better to signal this to > the user and rollback the MST configuration (as in the case of any other > error). > > I will change my mind if you point out i915, amdgpu or nouveau drivers > ignoring the ACT issues. > Sure. Until I can find more convincing evidence, I will make the changes as requested.