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([2a05:6e02:1041:c10:ecac:6a8e:204a:6b4]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-47be3a9687dsm142348025e9.3.2025.12.24.02.31.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Dec 2025 02:31:42 -0800 (PST) Message-ID: Date: Wed, 24 Dec 2025 11:31:41 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/3] Add the System Timer Module counter From: Daniel Lezcano To: wbg@kernel.org Cc: s32@nxp.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robh@kernel.org References: <20251217075000.2592966-1-daniel.lezcano@linaro.org> Content-Language: en-US In-Reply-To: <20251217075000.2592966-1-daniel.lezcano@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi William, just a heads up about these changes. Thanks -- Daniel On 12/17/25 08:49, Daniel Lezcano wrote: > The NXP S32 family provides a System Timer Module (STM), a 32-bit > free-running counter clocked from a peripheral clock. The STM includes > a prescaler and one or more compare channels generating optional > interrupts. When used as a generic hardware counter, only the main > free-running counter is required, while the compare channels are > typically unused. > > On S32G2 devices, the STM is exposed as a simple counter block that > can operate continuously and be shared across subsystems such as the > Linux kernel, firmware components running on Cortex-M7 cores, or other > co-processors. The counter can be read atomically and provides a > stable timestamp source to correlate events occurring in different > execution contexts. > > The Linux kernel controls the STM through a memory-mapped interface, > configuring the prescaler, enabling or disabling the counter, and > accounting for wrap-arounds. Other subsystems access the counter in > read-only mode, making it a shared timestamp reference across the > platform. > > This driver adds support for the STM when used as a counter on S32G2 > platforms. The device is described in the device tree using the > following compatible: > > compatible = "nxp,s32g2-stm-cnt"; > > The driver exposes basic counter functionality: start, stop, reset, > prescaler configuration, and overflow handling. > > Changelog: > * v3 > - Fixed compatible typo "nxp,s32g2-stm" to "nxp,s32g2-stm-cnt" > > * v2 > - Added Rob's tag > ** kbuild > - Reordered alphabetically the headers > - Added bitfield.h header > - Use DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr() > > Daniel Lezcano (3): > counters: Reorder the Makefile > dt-bindings: counter: Add NXP System Timer Module Counter > counter: Add STM based counter > > .../bindings/counter/nxp,s32g2-stm-cnt.yaml | 64 +++ > drivers/counter/Kconfig | 10 + > drivers/counter/Makefile | 21 +- > drivers/counter/nxp-stm-cnt.c | 386 ++++++++++++++++++ > 4 files changed, 472 insertions(+), 9 deletions(-) > create mode 100644 Documentation/devicetree/bindings/counter/nxp,s32g2-stm-cnt.yaml > create mode 100644 drivers/counter/nxp-stm-cnt.c > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog