From: "Xin Tian" <tianx@yunsilicon.com>
To: "Andrew Lunn" <andrew@lunn.ch>
Cc: "Andrew Lunn" <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
"Eric Dumazet" <edumazet@google.com>,
"Jakub Kicinski" <kuba@kernel.org>,
"Paolo Abeni" <pabeni@redhat.com>,
"Jason Gunthorpe" <jgg@ziepe.ca>,
"Leon Romanovsky" <leon@kernel.org>, <weihg@yunsilicon.com>,
<linux-kernel@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-rdma@vger.kernel.org>
Subject: Re: [PATCH 02/15] yunsilicon: add the register HAL
Date: Wed, 4 Nov 2026 19:39:09 +0800 [thread overview]
Message-ID: <fbea0512-f1d1-483b-b04f-eec0948db42a@yunsilicon.com> (raw)
In-Reply-To: <d9d02f67-558f-426f-b3a4-b13bd0a95c0e@lunn.ch>
On 10/12/2026 11:21 PM, Andrew Lunn wrote:
> On Mon, Oct 12, 2026 at 07:43:55PM +0800, Xin Tian wrote:
>> Add the register access layer and the per-device register map: doorbell
>> and interrupt registers, the command queue pointers and the device
>> capability queries that the upper layers call. The register map is
>> described by xsc_hal.h and implemented for the Andes device.
>>
>> Signed-off-by: Xin Tian <tianx@yunsilicon.com>
>> ---
>> .../net/ethernet/yunsilicon/xsc/pci/Makefile | 2 +-
>> .../yunsilicon/xsc/pci/hal/andes_impl.c | 708 ++++++++++++++++++
>> .../yunsilicon/xsc/pci/hal/andes_reg.h | 43 ++
>> .../ethernet/yunsilicon/xsc/pci/hal/xsc_hal.h | 85 +++
>> .../net/ethernet/yunsilicon/xsc/pci/main.c | 3 +
>> 5 files changed, 840 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/net/ethernet/yunsilicon/xsc/pci/hal/andes_impl.c
>> create mode 100644 drivers/net/ethernet/yunsilicon/xsc/pci/hal/andes_reg.h
>> create mode 100644 drivers/net/ethernet/yunsilicon/xsc/pci/hal/xsc_hal.h
>>
>> diff --git a/drivers/net/ethernet/yunsilicon/xsc/pci/Makefile b/drivers/net/ethernet/yunsilicon/xsc/pci/Makefile
>> index c163aa950..81b65232e 100644
>> --- a/drivers/net/ethernet/yunsilicon/xsc/pci/Makefile
>> +++ b/drivers/net/ethernet/yunsilicon/xsc/pci/Makefile
>> @@ -6,4 +6,4 @@ ccflags-y += -I$(srctree)/drivers/net/ethernet/yunsilicon/xsc
>>
>> obj-$(CONFIG_YUNSILICON_XSC_PCI) += xsc_pci.o
>>
>> -xsc_pci-y := main.o
>> +xsc_pci-y := main.o hal/andes_impl.o
>> diff --git a/drivers/net/ethernet/yunsilicon/xsc/pci/hal/andes_impl.c b/drivers/net/ethernet/yunsilicon/xsc/pci/hal/andes_impl.c
>> new file mode 100644
>> index 000000000..46fc045f9
>> --- /dev/null
>> +++ b/drivers/net/ethernet/yunsilicon/xsc/pci/hal/andes_impl.c
>> @@ -0,0 +1,708 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/* Copyright (C) 2024 - 2026, Shanghai Yunsilicon Technology Co., Ltd.
>> + * All rights reserved.
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/pci.h>
>> +#include "andes_reg.h"
>> +#include "common/xsc_core.h"
>> +#include "common/xsc_cmd.h"
>> +#include "common/xsc_hsi.h"
>> +#include "common/xsc_reg.h"
>> +#include "xsc_hal.h"
>> +
>> +/* message opcode */
>> +enum {
>> + XSC_MSG_OPCODE_SEND = 0,
>> + XSC_MSG_OPCODE_RDMA_WRITE = 1,
>> + XSC_MSG_OPCODE_RDMA_READ = 2,
>> + XSC_MSG_OPCODE_MAD = 3,
>> + XSC_MSG_OPCODE_RDMA_ACK = 4,
>> + XSC_MSG_OPCODE_RDMA_ACK_READ = 5,
>> + XSC_MSG_OPCODE_RDMA_CNP = 6,
>> + XSC_MSG_OPCODE_RAW = 7,
>> + XSC_MSG_OPCODE_VIRTIO_NET = 8,
>> + XSC_MSG_OPCODE_VIRTIO_BLK = 9,
>> + XSC_MSG_OPCODE_RAW_TPE = 10,
>> + XSC_MSG_OPCODE_INIT_QP_REQ = 11,
>> + XSC_MSG_OPCODE_INIT_QP_RSP = 12,
>> + XSC_MSG_OPCODE_INIT_PATH_REQ = 13,
>> + XSC_MSG_OPCODE_INIT_PATH_RSP = 14,
>> +
>> + XSC_MSG_OPCODE_UNSUPPORT = -1,
>> +};
>> +
>> +#define REG_ADDR(bp, offset) ((bp) + (offset))
>> +
>> +static void xsc_read32(void __iomem *bar, u32 off, void *data, int len)
>> +{
>> + u32 val = readl(REG_ADDR(bar, off));
>> +
>> + memcpy(data, &val, len);
Hi Andrew,
Both are fixed in v1, which I'll post shortly.
> Why memcpy. Probably because the types are messed up.
Fixed.
>> +}
>> +
>> +static void xsc_write32(void __iomem *bar, u32 off, void *data)
>> +{
>> + writel(*(u32 *)data, REG_ADDR(bar, off));
>> +}
> Please sort out your types. You should not be passing a void *. Pass
> u32 *. Casts are a red flag, they are generally not needed and
> normally indicate bad design.
>
> Andrew
Fixed.
Thanks,
Xin Tian
next prev parent reply other threads:[~2026-11-04 11:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-12 11:44 [PATCH 00/15] Yunsilicon ethernet and RDMA drivers Xin Tian
2026-10-12 11:43 ` [PATCH 01/15] yunsilicon: add PCI core driver skeleton Xin Tian
2026-10-12 11:43 ` [PATCH 02/15] yunsilicon: add the register HAL Xin Tian
2026-10-12 15:21 ` Andrew Lunn
2026-11-04 11:39 ` Xin Tian [this message]
2026-10-12 11:43 ` [PATCH 03/15] yunsilicon: add the command queue Xin Tian
2026-10-13 3:11 ` Junxian Huang
2026-10-13 14:31 ` Leon Romanovsky
2026-11-04 11:40 ` Xin Tian
2026-11-04 11:43 ` Xin Tian
2026-10-12 11:44 ` [PATCH 04/15] yunsilicon: add event queues, interrupts and the Xin Tian
2026-10-12 11:44 ` [PATCH 05/15] yunsilicon: add the CQ and QP resource pools Xin Tian
2026-10-12 11:44 ` [PATCH 06/15] yunsilicon: add ethernet netdev registration Xin Tian
2026-10-12 11:44 ` [PATCH 07/15] yunsilicon: add ethernet TX path Xin Tian
2026-10-12 11:44 ` [PATCH 08/15] yunsilicon: add ethernet RX path and statistics Xin Tian
2026-10-12 11:44 ` [PATCH 09/15] yunsilicon: add RDMA device support Xin Tian
2026-10-13 6:17 ` Junxian Huang
2026-11-04 11:46 ` Xin Tian
2026-10-12 11:44 ` [PATCH 10/15] yunsilicon: add RDMA PD/MR Xin Tian
2026-10-12 11:44 ` [PATCH 11/15] yunsilicon: add RDMA CQ/SRQ/AH Xin Tian
2026-10-12 11:44 ` [PATCH 12/15] yunsilicon: add RDMA QP verbs Xin Tian
2026-10-12 11:44 ` [PATCH 13/15] yunsilicon: add the RDMA send path Xin Tian
2026-10-12 11:44 ` [PATCH 14/15] yunsilicon: add RDMA counters and sysfs Xin Tian
2026-10-12 11:44 ` [PATCH 15/15] MAINTAINERS: add the Yunsilicon XSC drivers Xin Tian
2026-10-13 14:34 ` [PATCH 00/15] Yunsilicon ethernet and RDMA drivers Leon Romanovsky
2026-11-04 11:47 ` Xin Tian
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