From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38B1B4A3F26; Mon, 19 Oct 2026 09:55:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792403723; cv=none; b=Cez3Qe5vs336HTYJloPadXpebqhZAGpYjrSX/trVQaLoKOqw/ft/wNV6vG5ovpcZQ5wCeyUrIGpWrEgrBOivlJcg/rbUlwMI3tsK4RXrkQDD+DbLLQ6XOhc38hnuh7RRZPPCPhelG2qkk+Bnk/rg9za5kFYVnCeg02eHB3WTPBc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792403723; c=relaxed/simple; bh=ZAzYRrnVrp7LVtZMtaXO3WoR0zPjaRNfxBzvxbNHw4Q=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=I2Nnh1KeobkdYif+yuq9BwL5wGgl/bDuGxUJzpWwTGFEKuYMJDv3/tX3iaNFijts5b4h84bmfr8E3shLhDsFOGf/zj47tbvG/YAVCm6ciscI4GgNJsQ03HdcauHVrkN4jKM8+wDvvX1izbVr6eD1Up4G6Mti2CKu+sCCzp+61WQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FEdFOg+t; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FEdFOg+t" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0418F1F000C4; Mon, 19 Oct 2026 09:55:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1792403721; bh=cEDEdBQSjfHF2sgr1B0e6z58gBo2WM/Q9xw4l5QiHv0=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=FEdFOg+t9QR8ckTMiMXLv+8cjdPdG44hFp6TDdPICFAKaNE+1CCBlpobOSfnRgchx TX2Q7I5rkdJuVEHA0BfQA+YPXMc5hep5s5Pw4hitbC7PQpZfUVKkHaNkauiW4uWx6j YB0i2FWG5i/CDU1WV7/bqFEdrH0WULhGg+c8QREU43urszcsKlaVlHluDrorEHffA4 twn4XgnbKQUYZrAbYmNfmrFKb2ucNza8qiFpq00Byu47vMQee6kTiqOZ0lwYzV/Iss S1+jQdVvF4C2OrvzSU7kBz9NYN0zTJ8WZ/HCdaxWnVLMmdrZI0t9IAm1YhTeK6oG+A gP6L1rllajBtw== Message-ID: Date: Mon, 19 Oct 2026 10:55:16 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/7] phy: qcom-mipi-csi2: fix -EEXIST probe failure on single power-domain SoCs To: Anusha Arun Nandi , vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, mani@kernel.org Cc: gjorgji.rosikopulos@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com, jigarkumar.zala@oss.qualcomm.com, loic.poulain@oss.qualcomm.com, vladimir.zapolskiy@linaro.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261016235502.2274268-1-anusha.nandi@oss.qualcomm.com> <0L6D4EGEbw9SabH4L1sIcfqiZK6SmLBEjQEK5ljwkWxWQyXebQ9BNv71oBQmg61s3p8ja2Se4FlB5VtG5EdMXQ==@protonmail.internalid> <20261016235502.2274268-2-anusha.nandi@oss.qualcomm.com> From: Bryan O'Donoghue Content-Language: en-GB Autocrypt: addr=bod@kernel.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 17/10/2026 00:54, Anusha Arun Nandi wrote: > sa8775p, qcs8300 and sc7280 each list exactly one power-domain ("top") > on the CSI2 PHY node. For a device with a single power-domain phandle, > the generic platform-bus code (platform_probe() -> > dev_pm_domain_attach()) auto-attaches it via genpd_dev_pm_attach() > before the driver's own probe() runs. phy_qcom_mipi_csi2_probe() then > unconditionally calls devm_pm_domain_attach_list(), which fails with > -EEXIST because dev->pm_domain is already set, and the driver treats > that as fatal: > > qcom-mipi-csi2-phy ace6000.phy: error -EEXIST: Failed to attach > power-domain list > qcom-mipi-csi2-phy ace6000.phy: probe with driver qcom-mipi-csi2-phy > failed with error -17 > > x1e80100 is unaffected: it lists three power-domains, so the generic > code does not auto-attach any of them (auto-attach only applies to > single-power-domain devices); the driver's explicit attach is the > only one that runs. > > For the single power-domain case, call dev_pm_domain_attach() instead > of devm_pm_domain_attach_list(): it returns early when dev->pm_domain > is already set, so csi2phy->pd_list is left NULL rather than built up > by hand. The three call sites that walk pd_list for genpd > performance-state scaling now guard against a NULL pd_list, which is > harmless since scaling is unused (scaled = false) on every SoC that has > a single "top" domain. Fix implies bug but, this patch really adds support for one power-domain cases. I think the patch title should be something like "Add support for single power-domain case" or if you believe it is a bugfix level change add Fixes: Cc: stable@vger.kernel.org My own preference is "Add support" since the driver hasn't been designed to support single PD cases thus far but, OTOH you could make an argument that that is in fact a design bug. > Signed-off-by: Anusha Arun Nandi > --- > .../phy/qualcomm/phy-qcom-mipi-csi2-core.c | 24 +++++++++++++------ > 1 file changed, 17 insertions(+), 7 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c > index c0a4fa20eaf0..00285be9dd64 100644 > --- a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c > +++ b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c > @@ -43,7 +43,7 @@ phy_qcom_mipi_csi2_set_clock_rates(struct mipi_csi2phy_device *csi2phy, > } > > pstate = 0; > - for (i = 0; i < csi2phy->pd_list->num_pds; i++) { > + for (i = 0; csi2phy->pd_list && i < csi2phy->pd_list->num_pds; i++) { > unsigned int perf; > > if (!csi2phy->soc_cfg->genpds[i].scaled) > @@ -174,7 +174,7 @@ static int phy_qcom_mipi_csi2_power_on(struct phy *phy) > unset_rate: > dev_pm_opp_set_rate(csi2phy->dev, 0); > > - for (i = 0; i < csi2phy->pd_list->num_pds; i++) { > + for (i = 0; csi2phy->pd_list && i < csi2phy->pd_list->num_pds; i++) { > if (!csi2phy->soc_cfg->genpds[i].scaled) > continue; > > @@ -204,7 +204,7 @@ static int phy_qcom_mipi_csi2_power_off(struct phy *phy) > > dev_pm_opp_set_rate(csi2phy->dev, 0); > > - for (i = 0; i < csi2phy->pd_list->num_pds; i++) { > + for (i = 0; csi2phy->pd_list && i < csi2phy->pd_list->num_pds; i++) { > if (!csi2phy->soc_cfg->genpds[i].scaled) > continue; > > @@ -233,6 +233,19 @@ static int phy_qcom_mipi_csi2_attach_pm_domains(struct mipi_csi2phy_device *csi2 > const char **pd_names; > int i; > > + /* > + * A device with a single power-domain entry in the devicetree is > + * already attached by the generic platform-bus code before probe() > + * runs (genpd_dev_pm_attach()), so calling devm_pm_domain_attach_list() > + * here would fail with -EEXIST. dev_pm_domain_attach() returns early > + * in that case (dev->pm_domain already set) instead of leaving > + * csi2phy->pd_list unset; this is fine since pd_list is only used for > + * performance-state scaling, which is unused ("scaled = false") on > + * every SoC that has a single "top" power-domain. > + */ This is alot of comment - looks like LLM babble to me. I think it can be dropped the code is pretty obvious, if num_genpds == 1 do this other thing here. > + if (csi2phy->soc_cfg->num_genpds == 1) > + return dev_pm_domain_attach(csi2phy->dev, 0); > + > pd_names = devm_kzalloc(csi2phy->dev, > sizeof(char *) * csi2phy->soc_cfg->num_genpds, > GFP_KERNEL); > @@ -369,11 +382,8 @@ static int phy_qcom_mipi_csi2_probe(struct platform_device *pdev) > return ret; > > ret = phy_qcom_mipi_csi2_attach_pm_domains(csi2phy); > - if (ret < 0 || csi2phy->pd_list == NULL) { > - if (ret == 0) > - ret = -ENODEV; > + if (ret < 0) > return dev_err_probe(dev, ret, "Failed to attach power-domain list\n"); > - } > > ret = devm_pm_runtime_enable(dev); > if (ret < 0) > -- > 2.34.1