From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
eugen.hristev@collabora.com
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: microchip: sama7g5: Fix RTT clock
Date: Sat, 31 Aug 2024 18:29:17 +0300 [thread overview]
Message-ID: <fc488ade-4ced-472d-83d4-505d7fc73a27@tuxon.dev> (raw)
In-Reply-To: <20240826165320.3068359-1-claudiu.beznea@tuxon.dev>
On 26.08.2024 19:53, Claudiu Beznea wrote:
> According to datasheet, Chapter 34. Clock Generator, section 34.2,
> Embedded characteristics, source clock for RTT is the TD_SLCK, registered
> with ID 1 by the slow clock controller driver. Fix RTT clock.
>
> Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Applied to at91-dt, thanks!
prev parent reply other threads:[~2024-08-31 15:29 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-26 16:53 Claudiu Beznea
2024-08-31 15:29 ` claudiu beznea [this message]
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