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From: Alejandro Lucero Palau <alucerop@amd.com>
To: Wei Huang <wei.huang2@amd.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org, netdev@vger.kernel.org
Cc: Jonathan.Cameron@Huawei.com, helgaas@kernel.org, corbet@lwn.net,
	davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
	pabeni@redhat.com, alex.williamson@redhat.com,
	gospo@broadcom.com, michael.chan@broadcom.com,
	ajit.khaparde@broadcom.com, somnath.kotur@broadcom.com,
	andrew.gospodarek@broadcom.com, manoj.panicker2@amd.com,
	Eric.VanTassell@amd.com, vadim.fedorenko@linux.dev,
	horms@kernel.org, bagasdotme@gmail.com, bhelgaas@google.com
Subject: Re: [PATCH V3 03/10] PCI/TPH: Add pci=notph to prevent use of TPH
Date: Wed, 24 Jul 2024 15:45:34 +0100	[thread overview]
Message-ID: <fc94330f-1ef0-8b84-ebb8-44fd74c4a3c9@amd.com> (raw)
In-Reply-To: <20240717205511.2541693-4-wei.huang2@amd.com>


On 7/17/24 21:55, Wei Huang wrote:
> TLP headers with incorrect steering tags (e.g. caused by buggy driver)
> can potentially cause issues when the system hardware consumes the tags.
> Provide a kernel option, with related helper functions, to completely
> prevent TPH from being enabled.


Maybe rephrase it for including a potential buggy device, including the cpu.


Also, what about handling this with a no-tph-allow device list instead 
of a generic binary option for the whole system?

Foreseeing some buggy or poor-performance implementations, or specific 
use cases where it could be counterproductive, maybe supporting both 
options.


> Co-developed-by: Eric Van Tassell <Eric.VanTassell@amd.com>
> Signed-off-by: Eric Van Tassell <Eric.VanTassell@amd.com>
> Signed-off-by: Wei Huang <wei.huang2@amd.com>
> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
> Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com>
> ---
>   .../admin-guide/kernel-parameters.txt         |  1 +
>   drivers/pci/pci-driver.c                      |  7 +++++-
>   drivers/pci/pci.c                             | 12 +++++++++
>   drivers/pci/pcie/tph.c                        | 25 +++++++++++++++++++
>   include/linux/pci-tph.h                       | 18 +++++++++++++
>   include/linux/pci.h                           |  1 +
>   6 files changed, 63 insertions(+), 1 deletion(-)
>   create mode 100644 include/linux/pci-tph.h
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index b2057241ea6c..65581ebd9b50 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -4655,6 +4655,7 @@
>   		nomio		[S390] Do not use MIO instructions.
>   		norid		[S390] ignore the RID field and force use of
>   				one PCI domain per PCI function
> +		notph		[PCIE] Do not use PCIe TPH
>   
>   	pcie_aspm=	[PCIE] Forcibly enable or ignore PCIe Active State Power
>   			Management.
> diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
> index af2996d0d17f..9722d070c0ca 100644
> --- a/drivers/pci/pci-driver.c
> +++ b/drivers/pci/pci-driver.c
> @@ -21,6 +21,7 @@
>   #include <linux/acpi.h>
>   #include <linux/dma-map-ops.h>
>   #include <linux/iommu.h>
> +#include <linux/pci-tph.h>
>   #include "pci.h"
>   #include "pcie/portdrv.h"
>   
> @@ -322,8 +323,12 @@ static long local_pci_probe(void *_ddi)
>   	pm_runtime_get_sync(dev);
>   	pci_dev->driver = pci_drv;
>   	rc = pci_drv->probe(pci_dev, ddi->id);
> -	if (!rc)
> +	if (!rc) {
> +		if (pci_tph_disabled())
> +			pcie_tph_disable(pci_dev);
> +
>   		return rc;
> +	}
>   	if (rc < 0) {
>   		pci_dev->driver = NULL;
>   		pm_runtime_put_sync(dev);
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 02b1d81b1419..4cbfd5b53be8 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -157,6 +157,9 @@ static bool pcie_ari_disabled;
>   /* If set, the PCIe ATS capability will not be used. */
>   static bool pcie_ats_disabled;
>   
> +/* If set, the PCIe TPH capability will not be used. */
> +static bool pcie_tph_disabled;
> +
>   /* If set, the PCI config space of each device is printed during boot. */
>   bool pci_early_dump;
>   
> @@ -166,6 +169,12 @@ bool pci_ats_disabled(void)
>   }
>   EXPORT_SYMBOL_GPL(pci_ats_disabled);
>   
> +bool pci_tph_disabled(void)
> +{
> +	return pcie_tph_disabled;
> +}
> +EXPORT_SYMBOL_GPL(pci_tph_disabled);
> +
>   /* Disable bridge_d3 for all PCIe ports */
>   static bool pci_bridge_d3_disable;
>   /* Force bridge_d3 for all PCIe ports */
> @@ -6869,6 +6878,9 @@ static int __init pci_setup(char *str)
>   				pci_no_domains();
>   			} else if (!strncmp(str, "noari", 5)) {
>   				pcie_ari_disabled = true;
> +			} else if (!strcmp(str, "notph")) {
> +				pr_info("PCIe: TPH is disabled\n");
> +				pcie_tph_disabled = true;
>   			} else if (!strncmp(str, "cbiosize=", 9)) {
>   				pci_cardbus_io_size = memparse(str + 9, &str);
>   			} else if (!strncmp(str, "cbmemsize=", 10)) {
> diff --git a/drivers/pci/pcie/tph.c b/drivers/pci/pcie/tph.c
> index e385b871333e..ad58a892792c 100644
> --- a/drivers/pci/pcie/tph.c
> +++ b/drivers/pci/pcie/tph.c
> @@ -7,8 +7,33 @@
>    *     Wei Huang <wei.huang2@amd.com>
>    */
>   
> +#include <linux/pci.h>
> +#include <linux/bitfield.h>
> +#include <linux/pci-tph.h>
> +
>   #include "../pci.h"
>   
> +/* Update the TPH Requester Enable field of TPH Control Register */
> +static void set_ctrl_reg_req_en(struct pci_dev *pdev, u8 req_type)
> +{
> +	u32 reg_val;
> +
> +	pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, &reg_val);
> +
> +	reg_val &= ~PCI_TPH_CTRL_REQ_EN_MASK;
> +	reg_val |= FIELD_PREP(PCI_TPH_CTRL_REQ_EN_MASK, req_type);
> +
> +	pci_write_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, reg_val);
> +}
> +
> +void pcie_tph_disable(struct pci_dev *pdev)
> +{
> +	if (!pdev->tph_cap)
> +		return;
> +
> +	set_ctrl_reg_req_en(pdev, PCI_TPH_REQ_DISABLE);
> +}
> +
>   void pcie_tph_init(struct pci_dev *pdev)
>   {
>   	pdev->tph_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_TPH);
> diff --git a/include/linux/pci-tph.h b/include/linux/pci-tph.h
> new file mode 100644
> index 000000000000..e0b782bda929
> --- /dev/null
> +++ b/include/linux/pci-tph.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * TPH (TLP Processing Hints)
> + *
> + * Copyright (C) 2024 Advanced Micro Devices, Inc.
> + *     Eric Van Tassell <Eric.VanTassell@amd.com>
> + *     Wei Huang <wei.huang2@amd.com>
> + */
> +#ifndef LINUX_PCI_TPH_H
> +#define LINUX_PCI_TPH_H
> +
> +#ifdef CONFIG_PCIE_TPH
> +void pcie_tph_disable(struct pci_dev *dev);
> +#else
> +static inline void pcie_tph_disable(struct pci_dev *dev) {}
> +#endif
> +
> +#endif /* LINUX_PCI_TPH_H */
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 6631ebe80ca9..05fbbd9ad6b4 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -1840,6 +1840,7 @@ static inline bool pci_aer_available(void) { return false; }
>   #endif
>   
>   bool pci_ats_disabled(void);
> +bool pci_tph_disabled(void);
>   
>   #ifdef CONFIG_PCIE_PTM
>   int pci_enable_ptm(struct pci_dev *dev, u8 *granularity);

  parent reply	other threads:[~2024-07-24 14:46 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-17 20:55 [PATCH V3 00/10] PCIe TPH and cache direct injection support Wei Huang
2024-07-17 20:55 ` [PATCH V3 01/10] PCI: Introduce PCIe TPH support framework Wei Huang
2024-07-17 20:55 ` [PATCH V3 02/10] PCI: Add TPH related register definition Wei Huang
2024-07-23 22:33   ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 03/10] PCI/TPH: Add pci=notph to prevent use of TPH Wei Huang
2024-07-23 22:41   ` Bjorn Helgaas
2024-07-24 20:05     ` Wei Huang
2024-07-25 21:29       ` Bjorn Helgaas
2024-07-29 14:56         ` Wei Huang
2024-07-24 14:45   ` Alejandro Lucero Palau [this message]
2024-07-24 15:36     ` Bjorn Helgaas
2024-07-24 20:08       ` Wei Huang
2024-07-17 20:55 ` [PATCH V3 04/10] PCI/TPH: Add pci=nostmode to force No ST Mode Wei Huang
2024-07-23 22:44   ` Bjorn Helgaas
2024-08-02  4:29     ` Wei Huang
2024-08-02 17:05       ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 05/10] PCI/TPH: Introduce API to check interrupt vector mode support Wei Huang
2024-07-23 22:28   ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 06/10] PCI/TPH: Introduce API to retrieve TPH steering tags from ACPI Wei Huang
2024-07-23 22:22   ` Bjorn Helgaas
2024-08-02  4:58     ` Wei Huang
2024-08-02 16:58       ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 07/10] PCI/TPH: Introduce API to update TPH steering tags in PCIe devices Wei Huang
2024-07-23 23:15   ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 08/10] PCI/TPH: Add TPH documentation Wei Huang
2024-07-23 21:50   ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 09/10] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-07-23 16:48   ` Bjorn Helgaas
2024-08-02  5:44     ` Wei Huang
2024-08-02 17:00       ` Bjorn Helgaas
2024-07-17 20:55 ` [PATCH V3 10/10] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
2024-07-20  8:08 ` [PATCH V3 00/10] PCIe TPH and cache direct injection support Lukas Wunner
2024-07-22 14:44   ` Wei Huang
2024-07-22 14:58     ` Lukas Wunner
2024-07-20 19:25 ` David Wei
2024-07-22 15:38   ` Wei Huang

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