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Wed, 18 Feb 2026 12:08:05 -0600 Received: from [172.24.233.254] (santhoshkumark.dhcp.ti.com [172.24.233.254]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 61II7xgS802418; Wed, 18 Feb 2026 12:08:00 -0600 Message-ID: Date: Wed, 18 Feb 2026 23:37:59 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v2 09/12] spi: cadence-quadspi: add PHY tuning infrastructure To: Miquel Raynal CC: , , , , , , , , , , , , , , , , , References: <20260113141617.1905039-1-s-k6@ti.com> <20260113141617.1905039-10-s-k6@ti.com> <87bji3gkda.fsf@bootlin.com> <012a44f3-973f-4f34-be69-286cf924a6c6@ti.com> <87a4xdxdht.fsf@bootlin.com> Content-Language: en-US From: Santhosh Kumar K In-Reply-To: <87a4xdxdht.fsf@bootlin.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF0000231C:EE_|CY8PR10MB7218:EE_ X-MS-Office365-Filtering-Correlation-Id: feed5c0b-d9b4-41f9-a0d3-08de6f18aa53 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014|7416014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MyaPTViZISQaMwOu+clrlcedqQewv7tEYNPo7RZDuVcZGO+/QdnQx11y7rhkyWJMH+bHVT0Wd1iiFdTZTHX3IAtqnHF6PhIyOVl+9B2EYiWWpvv/cZPy7Dz+TVP+4Y7i2gNiM2ekqMzixM/NgwJhD73BpuxEYymJFHAXAEsQTvGzpUbr7d0Xr7Z+cpy5HQ5Dfh38dteiJHf9gFf0qoIqal14nV/P+58ZlT0emsWBtM8h7wSAuAfSgX2m3NWuBEQhrhQ9TOFH0mhgCALpCjGNDU3n1J0wZmd71c4C6tmOOT0zBRhRwZVuWrw6p5fpIowhP7iyNgAE2+oZXaY0pz05WMQ62l6+gn4udxqK3V7YXxDfQdL0GJ/Caq1iDhWVn28gRXOzZbWc+yrUmZSUM3NAguuVwQ0/QzItwctMmAHAF2bSArx3CzHusxant4VHCNH3 X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2026 18:08:05.9424 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: feed5c0b-d9b4-41f9-a0d3-08de6f18aa53 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF0000231C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR10MB7218 Hello Miquel, On 13/02/26 13:48, Miquel Raynal wrote: > On 07/02/2026 at 00:55:49 +0530, Santhosh Kumar K wrote: > >> On 05/02/26 23:09, Miquel Raynal wrote: >>> On 13/01/2026 at 19:46:14 +0530, Santhosh Kumar K wrote: >>> >>>> Implement the spi_controller_mem_ops execute_tuning callback to enable >>>> PHY tuning support for the Cadence controller. PHY tuning optimizes data >>>> capture timing at high frequencies by calibrating the read data capture >>>> delay through the controller's PHY interface. >>>> >>>> Tuning algorithm functions (cqspi_phy_tuning_ddr/sdr and >>>> cqspi_phy_pre/post_config) are placeholders to be implemented >>>> in subsequent commits. >>>> >>>> Signed-off-by: Santhosh Kumar K >>>> --- >>>> drivers/spi/spi-cadence-quadspi.c | 241 ++++++++++++++++++++++++++++++ >>>> 1 file changed, 241 insertions(+) >>>> >>>> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c >>>> index 0df286d24256..b8b0e85f4f68 100644 >>>> --- a/drivers/spi/spi-cadence-quadspi.c >>>> +++ b/drivers/spi/spi-cadence-quadspi.c >>>> @@ -32,6 +32,7 @@ >>>> #define CQSPI_NAME "cadence-qspi" >>>> #define CQSPI_MAX_CHIPSELECT 4 >>>> +#define CQSPI_AM654_NON_PHY_CLK_RATE 25000000 >>>> static_assert(CQSPI_MAX_CHIPSELECT <= SPI_DEVICE_CS_CNT_MAX); >>>> @@ -65,6 +66,7 @@ struct cqspi_st; >>>> struct cqspi_flash_pdata { >>>> struct cqspi_st *cqspi; >>>> u32 clk_rate; >>>> + u32 non_phy_clk_rate; >>> This is the second (and last) main issue I have with the series as it >>> is >>> right now. We cannot set this type of frequency in the driver IMO, it is >>> too board specific. >>> We currently have a DT property for the SPI maximum supported >>> frequency. I believe this is no longer enough. Why not making this >>> frequency property an array? First frequency would be the default, >>> non tuned maximum frequency. The second would be the maximum frequency >>> reachable when tuning the PHY. >> >> If the concern is only about where this is set, we could introduce a DT >> property such as "non-phy-max-freq" to carry this information. This >> would allow us to avoid any changes to the existing "spi-max-frequency" >> handling. Let me know your thoughts on this. > > Naming is difficult, non-phy-max-freq is too TI specific. I was > proposing the evolution of spi-max-frequency because it is backward > compatible. The naming can be discussed after you send a proposal, but > do not include "non-phy" in it. It shall reflect the fact that with fine > tuning we can reach higher frequencies on certain operations. I tried your suggestion of keeping an array of frequencies in spi-max-frequency: spi-max-frequency = <25000000 166000000>; (non_phy_freq phy_freq) and updating max_speed_hz with phy_freq once tuning succeeds. Bad news! this doesn't seem to work as we expected. The read_op->max_freq for both NOR and NAND is initially set to non_phy_freq, and it does not appear to be updated again by adjust_op_freq() after tuning completes as the if case fails. Regards, Santhosh. > > Mark, any take on this? > >> I'll also test the approach you suggested and share my inputs based on >> the results. By the way, where are you insisting to adjust/switch to >> the maximum frequency - within the controller driver or in the >> spi-core? > > It is preferable to make the decisions in the core and avoid being smart > in controller drivers, if possible. > > Thanks, > Miquèl > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/