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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2021 15:11:35.6350 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 64df195b-0c5a-4d81-9bc8-08d97ddb44ef X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT012.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5242 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/15/2021 12:50 PM, Shameer Kolothum wrote: > Move the PCI Device IDs of HiSilicon ACC devices to > a common header and use a uniform naming convention. > > This will be useful when we introduce the vfio PCI > HiSilicon ACC live migration driver in subsequent patches. > > Signed-off-by: Shameer Kolothum > --- > drivers/crypto/hisilicon/hpre/hpre_main.c | 12 +++++------- > drivers/crypto/hisilicon/sec2/sec_main.c | 2 -- > drivers/crypto/hisilicon/zip/zip_main.c | 11 ++++------- > include/linux/hisi_acc_qm.h | 7 +++++++ > 4 files changed, 16 insertions(+), 16 deletions(-) > > diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c > index 65a641396c07..1de67b5baae3 100644 > --- a/drivers/crypto/hisilicon/hpre/hpre_main.c > +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c > @@ -68,8 +68,6 @@ > #define HPRE_REG_RD_INTVRL_US 10 > #define HPRE_REG_RD_TMOUT_US 1000 > #define HPRE_DBGFS_VAL_MAX_LEN 20 > -#define HPRE_PCI_DEVICE_ID 0xa258 > -#define HPRE_PCI_VF_DEVICE_ID 0xa259 > #define HPRE_QM_USR_CFG_MASK GENMASK(31, 1) > #define HPRE_QM_AXI_CFG_MASK GENMASK(15, 0) > #define HPRE_QM_VFG_AX_MASK GENMASK(7, 0) > @@ -111,8 +109,8 @@ > static const char hpre_name[] = "hisi_hpre"; > static struct dentry *hpre_debugfs_root; > static const struct pci_device_id hpre_dev_ids[] = { > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_PCI_DEVICE_ID) }, > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_PCI_VF_DEVICE_ID) }, > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_PF_PCI_DEVICE_ID) }, > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HPRE_VF_PCI_DEVICE_ID) }, > { 0, } > }; > > @@ -242,7 +240,7 @@ MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC); > > static int pf_q_num_set(const char *val, const struct kernel_param *kp) > { > - return q_num_set(val, kp, HPRE_PCI_DEVICE_ID); > + return q_num_set(val, kp, HPRE_PF_PCI_DEVICE_ID); > } > > static const struct kernel_param_ops hpre_pf_q_num_ops = { > @@ -921,7 +919,7 @@ static int hpre_debugfs_init(struct hisi_qm *qm) > qm->debug.sqe_mask_len = HPRE_SQE_MASK_LEN; > hisi_qm_debug_init(qm); > > - if (qm->pdev->device == HPRE_PCI_DEVICE_ID) { > + if (qm->pdev->device == HPRE_PF_PCI_DEVICE_ID) { > ret = hpre_ctrl_debug_init(qm); > if (ret) > goto failed_to_create; > @@ -958,7 +956,7 @@ static int hpre_qm_init(struct hisi_qm *qm, struct pci_dev *pdev) > qm->sqe_size = HPRE_SQE_SIZE; > qm->dev_name = hpre_name; > > - qm->fun_type = (pdev->device == HPRE_PCI_DEVICE_ID) ? > + qm->fun_type = (pdev->device == HPRE_PF_PCI_DEVICE_ID) ? > QM_HW_PF : QM_HW_VF; > if (qm->fun_type == QM_HW_PF) { > qm->qp_base = HPRE_PF_DEF_Q_BASE; > diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c > index 90551bf38b52..890ff6ab18dd 100644 > --- a/drivers/crypto/hisilicon/sec2/sec_main.c > +++ b/drivers/crypto/hisilicon/sec2/sec_main.c > @@ -20,8 +20,6 @@ > > #define SEC_VF_NUM 63 > #define SEC_QUEUE_NUM_V1 4096 > -#define SEC_PF_PCI_DEVICE_ID 0xa255 > -#define SEC_VF_PCI_DEVICE_ID 0xa256 > > #define SEC_BD_ERR_CHK_EN0 0xEFFFFFFF > #define SEC_BD_ERR_CHK_EN1 0x7ffff7fd > diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c > index 7148201ce76e..f35b8fd1ecfe 100644 > --- a/drivers/crypto/hisilicon/zip/zip_main.c > +++ b/drivers/crypto/hisilicon/zip/zip_main.c > @@ -15,9 +15,6 @@ > #include > #include "zip.h" > > -#define PCI_DEVICE_ID_ZIP_PF 0xa250 > -#define PCI_DEVICE_ID_ZIP_VF 0xa251 > - > #define HZIP_QUEUE_NUM_V1 4096 > > #define HZIP_CLOCK_GATE_CTRL 0x301004 > @@ -246,7 +243,7 @@ MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC); > > static int pf_q_num_set(const char *val, const struct kernel_param *kp) > { > - return q_num_set(val, kp, PCI_DEVICE_ID_ZIP_PF); > + return q_num_set(val, kp, ZIP_PF_PCI_DEVICE_ID); > } > > static const struct kernel_param_ops pf_q_num_ops = { > @@ -268,8 +265,8 @@ module_param_cb(vfs_num, &vfs_num_ops, &vfs_num, 0444); > MODULE_PARM_DESC(vfs_num, "Number of VFs to enable(1-63), 0(default)"); > > static const struct pci_device_id hisi_zip_dev_ids[] = { > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_ZIP_PF) }, > - { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_ZIP_VF) }, > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, ZIP_PF_PCI_DEVICE_ID) }, > + { PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, ZIP_VF_PCI_DEVICE_ID) }, > { 0, } > }; > MODULE_DEVICE_TABLE(pci, hisi_zip_dev_ids); > @@ -834,7 +831,7 @@ static int hisi_zip_qm_init(struct hisi_qm *qm, struct pci_dev *pdev) > qm->sqe_size = HZIP_SQE_SIZE; > qm->dev_name = hisi_zip_name; > > - qm->fun_type = (pdev->device == PCI_DEVICE_ID_ZIP_PF) ? > + qm->fun_type = (pdev->device == ZIP_PF_PCI_DEVICE_ID) ? > QM_HW_PF : QM_HW_VF; > if (qm->fun_type == QM_HW_PF) { > qm->qp_base = HZIP_PF_DEF_Q_BASE; > diff --git a/include/linux/hisi_acc_qm.h b/include/linux/hisi_acc_qm.h > index 8befb59c6fb3..2d209bf15419 100644 > --- a/include/linux/hisi_acc_qm.h > +++ b/include/linux/hisi_acc_qm.h > @@ -9,6 +9,13 @@ > #include > #include > > +#define ZIP_PF_PCI_DEVICE_ID 0xa250 > +#define ZIP_VF_PCI_DEVICE_ID 0xa251 > +#define SEC_PF_PCI_DEVICE_ID 0xa255 > +#define SEC_VF_PCI_DEVICE_ID 0xa256 > +#define HPRE_PF_PCI_DEVICE_ID 0xa258 > +#define HPRE_VF_PCI_DEVICE_ID 0xa259 > + maybe can be added to include/linux/pci_ids.h under the PCI_VENDOR_ID_HUAWEI definition ? > #define QM_QNUM_V1 4096 > #define QM_QNUM_V2 1024 > #define QM_MAX_VFS_NUM_V2 63