Re: [PATCH v2 1/3] arm64: dts: rockchip: use rgmii-id for the Orange Pi 5/5B ethernet PHY

[Andrew Lunn <andrew@lunn.ch>]

On Wed, Nov 11, 2026 at 07:19:49AM +0000, Arun Iyengar via B4 Relay wrote:
> From: Arun Iyengar <aiyengar1990@gmail.com>
> 
> The Orange Pi 5 and 5B have a Motorcomm YT8531C RGMII PHY on gmac1
> (the PHY driver binds as "YT8531 Gigabit Ethernet"). The board neither
> uses extra long clock traces for TX nor for RX, yet the device tree
> describes it as "rgmii-rxid", which according to ethernet-controller.yaml
> means that the PCB provides the TX delay, and then makes the MAC insert
> the TX delay with tx_delay = <0x42>. The setting was copied from the
> vendor kernel, which uses the MAC delay lines everywhere.
> 
> Describe the PCB correctly as "rgmii-id" and drop tx_delay, so that the
> MAC adds no delay and the PHY adds both: motorcomm.c programs its
> default 1950 ps for RX (as now) and for TX. This is the setup the
> binding recommends, and the one the same vendor's Orange Pi CM5
> (rk3588s-orangepi-cm5-base.dts), with a YT8531C on gmac1 of the same
> SoC, already uses in mainline.
> 
> Besides being the correct description, this removes the MAC from the
> timing path for both directions, so no board-specific delay-line value
> is needed any more.
> 
> Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew