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On silicon > DAP2_DIN is on ball PW0 (mux register 0x6050, drive register 0x6054) and > DAP2_DOUT is on ball PV7 (mux register 0x6058, drive register 0x605c), > as reflected by the board pinmux. > > Because the ball suffixes were swapped, the groups were also assigned the > wrong primary mux functions (dap2_din -> I2S2_SDATA_OUT and dap2_dout -> > I2S2_SDATA_IN), routing the I2S2 data-in and data-out signals to the wrong > pins and breaking DAP2 audio. > > Rename the groups to dap2_din_pw0 and dap2_dout_pv7 and give each pad its > correct function (dap2_din_pw0 -> I2S2_SDATA_IN, dap2_dout_pv7 -> > I2S2_SDATA_OUT). The register offsets are already correct and are left > unchanged. This matches the board pinmux. > > Fixes: c98506206912 ("pinctrl: tegra: Add Tegra264 pinmux driver") > Signed-off-by: Prathamesh Shete > --- > Changes in v2: > - Rename the pin groups to dap2_din_pw0 and dap2_dout_pv7 and assign the > correct mux function to each pad in a single driver patch. > --- > drivers/pinctrl/tegra/pinctrl-tegra264.c | 24 ++++++++++++------------ > 1 file changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/pinctrl/tegra/pinctrl-tegra264.c b/drivers/pinctrl/tegra/pinctrl-tegra264.c > index be64fba34dce..f8afb0bdb68a 100644 > --- a/drivers/pinctrl/tegra/pinctrl-tegra264.c > +++ b/drivers/pinctrl/tegra/pinctrl-tegra264.c > @@ -96,8 +96,8 @@ enum { > TEGRA_PIN_UART4_RTS_N_PV4, > TEGRA_PIN_UART4_CTS_N_PV5, > TEGRA_PIN_DAP2_CLK_PV6, > - TEGRA_PIN_DAP2_DIN_PV7, > - TEGRA_PIN_DAP2_DOUT_PW0, > + TEGRA_PIN_DAP2_DIN_PW0, > + TEGRA_PIN_DAP2_DOUT_PV7, > TEGRA_PIN_DAP2_FS_PW1, > TEGRA_PIN_GEN1_I2C_SCL_PW2, > TEGRA_PIN_GEN1_I2C_SDA_PW3, > @@ -329,8 +329,8 @@ static const struct pinctrl_pin_desc tegra264_main_pins[] = { > PINCTRL_PIN(TEGRA_PIN_UART4_RTS_N_PV4, "UART4_RTS_N_PV4"), > PINCTRL_PIN(TEGRA_PIN_UART4_CTS_N_PV5, "UART4_CTS_N_PV5"), > PINCTRL_PIN(TEGRA_PIN_DAP2_CLK_PV6, "DAP2_CLK_PV6"), > - PINCTRL_PIN(TEGRA_PIN_DAP2_DIN_PV7, "DAP2_DIN_PV7"), > - PINCTRL_PIN(TEGRA_PIN_DAP2_DOUT_PW0, "DAP2_DOUT_PW0"), > + PINCTRL_PIN(TEGRA_PIN_DAP2_DIN_PW0, "DAP2_DIN_PW0"), > + PINCTRL_PIN(TEGRA_PIN_DAP2_DOUT_PV7, "DAP2_DOUT_PV7"), > PINCTRL_PIN(TEGRA_PIN_DAP2_FS_PW1, "DAP2_FS_PW1"), > PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SCL_PW2, "GEN1_I2C_SCL_PW2"), > PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SDA_PW3, "GEN1_I2C_SDA_PW3"), > @@ -827,12 +827,12 @@ static const unsigned int dap2_clk_pv6_pins[] = { > TEGRA_PIN_DAP2_CLK_PV6, > }; > > -static const unsigned int dap2_din_pv7_pins[] = { > - TEGRA_PIN_DAP2_DIN_PV7, > +static const unsigned int dap2_din_pw0_pins[] = { > + TEGRA_PIN_DAP2_DIN_PW0, > }; > > -static const unsigned int dap2_dout_pw0_pins[] = { > - TEGRA_PIN_DAP2_DOUT_PW0, > +static const unsigned int dap2_dout_pv7_pins[] = { > + TEGRA_PIN_DAP2_DOUT_PV7, > }; > > static const unsigned int dap2_fs_pw1_pins[] = { > @@ -1834,8 +1834,8 @@ static const char * const tegra264_functions[] = { > #define drive_gen1_i2c_sda_pw3 DRV_PINGROUP_ENTRY_Y(0x601c, 12, 4, 20, 4, -1, -1, -1, -1, 0) > #define drive_dap2_fs_pw1 DRV_PINGROUP_ENTRY_Y(0x6044, 12, 4, 20, 4, -1, -1, -1, -1, 0) > #define drive_dap2_clk_pv6 DRV_PINGROUP_ENTRY_Y(0x604c, 12, 4, 20, 4, -1, -1, -1, -1, 0) > -#define drive_dap2_din_pv7 DRV_PINGROUP_ENTRY_Y(0x6054, 12, 4, 20, 4, -1, -1, -1, -1, 0) > -#define drive_dap2_dout_pw0 DRV_PINGROUP_ENTRY_Y(0x605c, 12, 4, 20, 4, -1, -1, -1, -1, 0) > +#define drive_dap2_din_pw0 DRV_PINGROUP_ENTRY_Y(0x6054, 12, 4, 20, 4, -1, -1, -1, -1, 0) > +#define drive_dap2_dout_pv7 DRV_PINGROUP_ENTRY_Y(0x605c, 12, 4, 20, 4, -1, -1, -1, -1, 0) > #define drive_pwm10_pv1 DRV_PINGROUP_ENTRY_Y(0x6064, 12, 4, 20, 4, -1, -1, -1, -1, 0) > #define drive_soc_gpio170_pu0 DRV_PINGROUP_ENTRY_Y(0x606c, 12, 4, 20, 4, -1, -1, -1, -1, 0) > #define drive_soc_gpio171_pu1 DRV_PINGROUP_ENTRY_Y(0x6074, 12, 4, 20, 4, -1, -1, -1, -1, 0) > @@ -2051,8 +2051,8 @@ static const struct tegra_pingroup tegra264_main_groups[] = { > PINGROUP(gen1_i2c_sda_pw3, I2C1_DAT, RSVD1, RSVD2, RSVD3, 0x6018, 0, Y, 5, 7, 6, 8, -1, 10, 11), > PINGROUP(dap2_fs_pw1, I2S2_LRCK, RSVD1, RSVD2, RSVD3, 0x6040, 0, Y, 5, 7, 6, 8, -1, 10, 11), > PINGROUP(dap2_clk_pv6, I2S2_SCLK, RSVD1, RSVD2, RSVD3, 0x6048, 0, Y, 5, 7, 6, 8, -1, 10, 11), > - PINGROUP(dap2_din_pv7, I2S2_SDATA_OUT, RSVD1, RSVD2, RSVD3, 0x6050, 0, Y, 5, 7, 6, 8, -1, 10, 11), > - PINGROUP(dap2_dout_pw0, I2S2_SDATA_IN, RSVD1, RSVD2, RSVD3, 0x6058, 0, Y, 5, 7, 6, 8, -1, 10, 11), > + PINGROUP(dap2_din_pw0, I2S2_SDATA_IN, RSVD1, RSVD2, RSVD3, 0x6050, 0, Y, 5, 7, 6, 8, -1, 10, 11), > + PINGROUP(dap2_dout_pv7, I2S2_SDATA_OUT, RSVD1, RSVD2, RSVD3, 0x6058, 0, Y, 5, 7, 6, 8, -1, 10, 11), > PINGROUP(pwm10_pv1, GP_PWM10, SDMMC1_CD, I2S7_LRCK, RSVD3, 0x6060, 0, Y, 5, 7, 6, 8, -1, 10, 11), > PINGROUP(soc_gpio170_pu0, RSVD0, I2S7_SDATA_IN, CCLA_LA_TRIGGER_MUX, RSVD3, 0x6068, 0, Y, 5, 7, 6, 8, -1, 10, 11), > PINGROUP(soc_gpio171_pu1, RSVD0, SPI4_SCK, RSVD2, RSVD3, 0x6070, 0, Y, 5, 7, 6, 8, -1, 10, 11), Reviewed-by: Jon Hunter Tested-by: Jon Hunter Thanks! Jon -- nvpublic