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Mon, 5 Oct 2026 12:31:04 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.2562.49 via Frontend Transport; Mon, 5 Oct 2026 12:31:04 -0700 From: Nicolin Chen To: CC: , , , , , , , , , , , Cristian Prundeanu , Breno Leitao Subject: [PATCH v11 05/11] iommu/arm-smmu-v3: Disable the EVTQ and the PRIQ in a kdump kernel Date: Mon, 5 Oct 2026 12:30:48 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0001AE1A:EE_|SN7PR12MB7786:EE_ X-MS-Office365-Filtering-Correlation-Id: 3de7c58c-ea4f-48bb-6220-08df2317430d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|7416014|23010399003|82310400026|36860700016|22082099003|18002099003|6133799003|10067099003|56012099006|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NHewLC9PFy7w2Lq6V4kcxbh3imGISJDoqsN+Y9e79Xs5uSn/rZfW1k/efYZBIluGDTpFnyXe3YzMQmA8oY7kgCfxGXHsn3OkJIJ3YaxaBqABmGj5rZcPbLFEuxBuRW0runl1CX/mErsBTIf8TOZ+DpayRQhlanLgspDltxTtSy6YxoLnZxOYgEANhzjmcvKZ56CALM3l3ZlpSeGWmHdfaGi/21XHdjLd7C2B1aJB4XIAh/ZIxbegjcJYFitVFijxix+COHO5UklxjJLcNW2QkAVUnGtOlPCgYJhDhy5qZM/Dk+ug7K1gx2I38C9PFMNaasyqiyFuZy2KFsnPnO1Gxb8howkoC8tvPRRb0AJ88Xe6bY2WWyuS/xgD75tdlg2DaYOtgZEsazDqZyIftFDsKVSVZId6cfBtEkhyz/HgpQo3dtK7dlAVLJF42S7O/HVP X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2026 19:31:32.5218 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3de7c58c-ea4f-48bb-6220-08df2317430d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE1A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7786 A kdump kernel cannot use either queue. The crashed kernel's CDs and page tables might be corrupted, so events would spam the EVTQ, and there is no way to serve the page requests that would arrive at the PRIQ. The reset routine still enables both of the queues and then masks the two enable bits back out, having already programmed the queue bases and taken the interrupts of both. Clear ARM_SMMU_FEAT_EVTQ and ARM_SMMU_FEAT_PRI in the probe instead, so as to entirely skip the queue initialization and handling in a kdump kernel. Suggested-by: Will Deacon Link: https://lore.kernel.org/all/amiBagGKn-Aym1DK@willie-the-truck/ Acked-by: Kiryl Shutsemau (Meta) Reviewed-by: Jason Gunthorpe Tested-by: Breno Leitao Tested-by: Cristian Prundeanu Assisted-by: LLM Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 756825e004774..42cd30c79211e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5247,9 +5247,6 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu) return ret; } - if (is_kdump_kernel()) - enables &= ~(CR0_EVTQEN | CR0_PRIQEN); - /* Enable the SMMU interface */ enables |= CR0_SMMUEN; ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, @@ -5576,6 +5573,15 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) if (arm_smmu_sva_supported(smmu)) smmu->features |= ARM_SMMU_FEAT_SVA; + /* + * A kdump kernel wants neither queue: the crashed kernel's CDs and page + * tables might be corrupted, spamming events, and page requests cannot + * be served. A disabled queue discards new records without raising any + * global error. + */ + if (is_kdump_kernel()) + smmu->features &= ~(ARM_SMMU_FEAT_EVTQ | ARM_SMMU_FEAT_PRI); + dev_info(smmu->dev, "oas %lu-bit (features 0x%08x)\n", smmu->oas, smmu->features); return 0; -- 2.43.0