From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753247AbdJLLMC (ORCPT ); Thu, 12 Oct 2017 07:12:02 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:49697 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751350AbdJLLL7 (ORCPT ); Thu, 12 Oct 2017 07:11:59 -0400 X-Google-Smtp-Source: AOwi7QCnELEw7wovhJs3YJqJPAklHP9B6MrmWokk2EIO3CxLplpYYt37Tzl0uipOoE3OXCjygE9g1A== Subject: Re: [PATCH v3 2/2] ARM: dts: tegra20: Add video decoder node To: Jon Hunter , Thierry Reding , Greg Kroah-Hartman , Rob Herring , Mauro Carvalho Chehab , Stephen Warren Cc: Dan Carpenter , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, devel@driverdev.osuosl.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <6fe375ea-4d8d-5dc2-2d17-c13aa1f46d71@gmail.com> <694edb38-ca8f-2580-5207-0ea2414f37ba@nvidia.com> From: Dmitry Osipenko Message-ID: Date: Thu, 12 Oct 2017 14:11:54 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <694edb38-ca8f-2580-5207-0ea2414f37ba@nvidia.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12.10.2017 13:57, Jon Hunter wrote: > > On 12/10/17 11:51, Dmitry Osipenko wrote: >> On 12.10.2017 11:49, Jon Hunter wrote: >>> >>> On 11/10/17 21:08, Dmitry Osipenko wrote: >>>> Add a device node for the video decoder engine found on Tegra20. >>>> >>>> Signed-off-by: Dmitry Osipenko >>>> --- >>>> arch/arm/boot/dts/tegra20.dtsi | 17 +++++++++++++++++ >>>> 1 file changed, 17 insertions(+) >>>> >>>> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi >>>> index 7c85f97f72ea..1b5d54b6c0cb 100644 >>>> --- a/arch/arm/boot/dts/tegra20.dtsi >>>> +++ b/arch/arm/boot/dts/tegra20.dtsi >>>> @@ -249,6 +249,23 @@ >>>> */ >>>> }; >>>> >>>> + vde@6001a000 { >>>> + compatible = "nvidia,tegra20-vde"; >>>> + reg = <0x6001a000 0x3D00 /* VDE registers */ >>>> + 0x40000400 0x3FC00>; /* IRAM region */ >>>> + reg-names = "regs", "iram"; >>>> + interrupts = , /* UCQ error interrupt */ >>>> + , /* Sync token interrupt */ >>>> + , /* BSE-V interrupt */ >>>> + , /* BSE-A interrupt */ >>>> + ; /* SXE interrupt */ >>>> + interrupt-names = "ucq-error", "sync-token", "bsev", "bsea", "sxe"; >>>> + clocks = <&tegra_car TEGRA20_CLK_VDE>; >>>> + clock-names = "vde"; >>>> + resets = <&tegra_car 61>; >>>> + reset-names = "vde"; >>>> + }; >>>> + >>> >>> I don't see any binding documentation for this node. We need to make >>> sure we add this. >>> >> >> It's in the first patch. >> >> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-vde.txt >> > > Ah yes indeed, then that needs to be a separate patch. > Okay