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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ba17392e952sm39513466b.15.2026.04.15.02.46.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 15 Apr 2026 02:46:16 -0700 (PDT) Message-ID: Date: Wed, 15 Apr 2026 11:46:13 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/7] spi: qcom-qspi: Fix incomplete error handling in runtime PM To: Viken Dadhaniya , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260414-spi-nor-v2-0-bcca40de4b5f@oss.qualcomm.com> <20260414-spi-nor-v2-2-bcca40de4b5f@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260414-spi-nor-v2-2-bcca40de4b5f@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: qteIbksZJA8dpI23lJ0p9cC3EebEXQ6Q X-Authority-Analysis: v=2.4 cv=eLMjSnp1 c=1 sm=1 tr=0 ts=69df5e6a cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=3Z6IiVtUJ8LA7v5DzrMA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE1MDA4OSBTYWx0ZWRfX9xplU4QxZrkl wMUZ2I8rDC/rHmBsoAMU7sUsfmMIaS1chTr8llY9urw0Bb7kwMbXlo83PLWZiD+Dwo0hTOEZo/G VSwJSR64lmdtxynq+U8YhfVNiseIjQ5jldqr1o5zEAep0XMAajKu5f42hU/FKkWnKEOfuMqEOas uP3QUkBD1Hr1gnZu5jOf+ZoV05uxRp7tzhPExKu2Fgs6PJV1zPXL0lRMHvSyysZlXfzae8oghZ3 CGDbvxOXXCzvHMa4XY5nf7mPrJsqNuGprac8lZG8g/ERqBPZVmAQUdySmZ3dm4q+5Puaut9TRFA /VOUCpgVrVCywNr5Z12mT7pB6iEYaqrCRTWDci92RfT+RqMuUoaBCsIgMtgGN1nG2NfaEsSOgUf TmBwTOuhFjtkhWWPqNjEIqJdLAM2ubqnvX0+BFPWVW8aijhlVFrD50eEJc8ge8i88F54C1kKovH lQcIzuh4l0Wf+GQcNxw== X-Proofpoint-ORIG-GUID: qteIbksZJA8dpI23lJ0p9cC3EebEXQ6Q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-14_04,2026-04-13_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604150089 On 4/14/26 7:08 PM, Viken Dadhaniya wrote: > The runtime PM functions had incomplete error handling that could leave the > system in an inconsistent state. If any operation failed midway through > suspend or resume, some resources would be left in the wrong state while > others were already changed, leading to potential clock/power imbalances. > > Fix by adding proper error checking for all operations and using goto-based > cleanup to ensure all successfully acquired resources are properly released > on any error. > > Signed-off-by: Viken Dadhaniya > --- > drivers/spi/spi-qcom-qspi.c | 40 +++++++++++++++++++++++++++++++++------- > 1 file changed, 33 insertions(+), 7 deletions(-) > > diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c > index 7e39038160e0..38af859713a7 100644 > --- a/drivers/spi/spi-qcom-qspi.c > +++ b/drivers/spi/spi-qcom-qspi.c > @@ -819,19 +819,31 @@ static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev) > int ret; > > /* Drop the performance state vote */ > - dev_pm_opp_set_rate(dev, 0); > + ret = dev_pm_opp_set_rate(dev, 0); > + if (ret) > + return ret; > + > clk_bulk_disable_unprepare(QSPI_NUM_CLKS, ctrl->clks); You first need to disable the clocks and only then potentially reduce the performance state, otherwise there's a brief period of brownout risk [...] > static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev) > @@ -840,20 +852,34 @@ static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev) > struct qcom_qspi *ctrl = spi_controller_get_devdata(host); > int ret; > > - pinctrl_pm_select_default_state(dev); > + ret = pinctrl_pm_select_default_state(dev); > + if (ret) > + return ret; > > ret = icc_enable(ctrl->icc_path_cpu_to_qspi); > if (ret) { > dev_err_ratelimited(ctrl->dev, "%s: ICC enable failed for cpu: %d\n", > __func__, ret); > - return ret; > + goto err_select_sleep_state; > } > > ret = clk_bulk_prepare_enable(QSPI_NUM_CLKS, ctrl->clks); > if (ret) > - return ret; > + goto err_disable_icc; > > - return dev_pm_opp_set_rate(dev, ctrl->last_speed * 4); > + ret = dev_pm_opp_set_rate(dev, ctrl->last_speed * 4); > + if (ret) > + goto err_disable_clk; similarly here, the OPP state is only altered after the clocks are running (potentially at a high speed because the rate is cached) Konrad