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[130.180.211.218]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-431b437c80fsm7645615e9.0.2024.10.28.18.16.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 28 Oct 2024 18:16:52 -0700 (PDT) Message-ID: Date: Tue, 29 Oct 2024 02:16:51 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] clocksource: Add Ralink System Tick Counter driver To: Sergio Paracuellos , linux-mips@vger.kernel.org Cc: tglx@linutronix.de, tsbogend@alpha.franken.de, john@phrozen.org, linux-kernel@vger.kernel.org, yangshiji66@outlook.com References: <20241028203643.191268-1-sergio.paracuellos@gmail.com> <20241028203643.191268-2-sergio.paracuellos@gmail.com> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <20241028203643.191268-2-sergio.paracuellos@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 28/10/2024 21:36, Sergio Paracuellos wrote: > System Tick Counter is present on Ralink SoCs RT3352 and MT7620. This > driver has been in 'arch/mips/ralink' directory since the beggining of > Ralink architecture support. However, it can be moved into a more proper > place in 'drivers/clocksource'. Hence add it here adding also support for > compile test targets and reducing LOC in architecture code folder. > > Signed-off-by: Sergio Paracuellos > --- Applied, thanks -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog