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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8e0901c150sm525160866b.69.2026.02.02.01.49.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Feb 2026 01:49:13 -0800 (PST) Message-ID: Date: Mon, 2 Feb 2026 10:49:10 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 0/4] arm64: dts: qcom: Introduce Glymur SoC dtsi and Glymur CRD dts To: Qiang Yu Cc: Bjorn Andersson , Pankaj Patil , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Jyothi Kumar Seerapu , Maulik Shah , Sibi Sankar , Taniya Das , Kamal Wadhwa , Manaf Meethalavalappu Pallikunhi , Jishnu Prakash , Dmitry Baryshkov , Abel Vesa References: <20260122-upstream_v3_glymur_introduction-v6-0-245f408ed82a@oss.qualcomm.com> <75lzykd37zdvrks5i2bb4zb2yzjtm25kv3hegmikndkbr772mz@w2ykff3ny45u> <6d2b92d0-55bb-4ce0-ad5e-316210a3d2c5@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: yEqNOoaeKnDmSvK0dA3ScfO4CeW8Cpa_ X-Proofpoint-GUID: yEqNOoaeKnDmSvK0dA3ScfO4CeW8Cpa_ X-Authority-Analysis: v=2.4 cv=P4w3RyAu c=1 sm=1 tr=0 ts=6980731c cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=qC_FGOx9AAAA:8 a=gEfo2CItAAAA:8 a=X8VJAXzcELPveP38kkEA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 a=fsdK_YakeE02zTmptMdW:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjAyMDA4NCBTYWx0ZWRfX8OwMSSuA/lOy 0ad8Qt+zh4RAeeP4d7sC+ryoxA3S2LGc4o36rTCmZidwtoAFVzHk7aqSsoT0kAHuAy84L6sn2cv UuiaDjRVCf5pWg0YRnp3ocg32r7I12YBitDAF0/OUvXiRbRGwh10+8ZGgUoAq3mQZm2zJs0qFM3 bTxEtQyEYH/bV+Ojnu82Ph95qYH7H/I/wtltEuN60ZML4JzfNDWQ3obh3tJp2k/heEw/1UeEPAF lyVu0mjrpF2NoHbwhw5QXFrEBoWqkMtNeDPn8wuCCq60iHXDYm8alo2SuzFby0eNo/d8wB91tXH twRccXxpMwdQDAKQd98PM4IOomF5IQ+FSuAN7x4wGyZ12ibVnQCSzNiMuNHIrtGw39Fb9lqDQTA bH5dljYgyoD84Hgp1st5VR72H9qmw2A7JTMVVHeRQf+H6p1u7kYTNJ93jqymH4jXUAaoyEwRP4k DhqjMFLn/W5fU7Nnupg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-02_03,2026-01-30_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 spamscore=0 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602020084 On 2/2/26 6:21 AM, Qiang Yu wrote: > On Thu, Jan 29, 2026 at 01:07:08PM +0100, Konrad Dybcio wrote: >> On 1/29/26 1:05 PM, Qiang Yu wrote: >>> On Wed, Jan 28, 2026 at 07:21:04PM -0600, Bjorn Andersson wrote: >>>> On Thu, Jan 22, 2026 at 08:53:57PM +0530, Pankaj Patil wrote: >>>>> Introduce dt-bindings and initial device tree support for Glymur, >>>>> Qualcomm's next-generation compute SoC and it's associated >>>>> Compute Reference Device (CRD) platform. >>>>> >>>>> https://www.qualcomm.com/products/mobile/snapdragon/laptops-and-tablets/snapdragon-x2-elite >>>>> https://www.qualcomm.com/news/releases/2025/09/new-snapdragon-x2-elite-extreme-and-snapdragon-x2-elite-are-the- >>>>> >>>>> The base support enables booting to shell with rootfs on NVMe, >>>>> demonstrating functionality for PCIe and NVMe subsystems. >>>>> DCVS is also enabled, allowing dynamic frequency scaling for the CPUs. >>>>> TSENS (Thermal Sensors) enabled for monitoring SoC temperature and >>>>> thermal management. The platform is capable of booting kernel at EL2 >>>>> with kvm-unit tests performed on it for sanity. >>>>> >>>>> Added dtsi files for the PMIC's enabled PMH0101, PMK8850, PMCX0102, >>>>> SMB2370, PMH0104, PMH0110 along with temp-alarm and GPIO nodeS. >>>>> >>>>> For CPU compatible naming, there is one discussion which is not specific >>>>> to Glymur, Kaanapali and Glymur use the same Oryon cores. >>>>> https://lore.kernel.org/all/20251119-oryon-binding-v1-1-f79a101b0391@oss.qualcomm.com/ >>>>> We've kept the "qcom,oryon" compatible >>>>> >>>>> Features enabled in this patchset: >>>>> 1. NVMe storage support >>>>> 2. PCIe controller and PCIe PHY >>>>> 3. RPMH Regulators >>>>> 4. Clocks and reset controllers - GCC, TCSRCC, DISPCC, RPMHCC >>>>> 5. Interrupt controller >>>>> 6. TLMM (Top-Level Mode Multiplexer) >>>>> 7. QUP Block >>>>> 8. Reserved memory regions >>>>> 9. PMIC support with regulators >>>>> 10. CPU Power Domains >>>>> 11. TSENS (Thermal Sensors) >>>>> 12. DCVS: CPU DCVS with scmi perf protocol >>>>> >>>>> Dependencies: >>>>> >>>>> dt-bindings: >>>>> 1. https://lore.kernel.org/all/20260121-glymur-pmic-mfd-v1-1-2aab4f21e79c@oss.qualcomm.com/ >>>>> 2. https://lore.kernel.org/all/20251215-knp-pmic-leds-v3-2-5e583f68b0e5@oss.qualcomm.com/ >>>>> 3. https://lore.kernel.org/all/20260121110828.2267061-1-pankaj.patil@oss.qualcomm.com/ >>>>> 4. https://lore.kernel.org/all/20260111155234.5829-1-pankaj.patil@oss.qualcomm.com/ >>>>> >>>>> Linux-next based tree with Glymur patches is available at: >>>>> https://git.codelinaro.org/clo/linux-kernel/kernel-qcom/-/tree/b4/v6_glymur_introduction >>>>> >>>> >>>> FWIW, I applied these patches onto next-20260128 to see if things has >>>> improved since Rob's report and I get: >>>> >>>> $ make qcom/glymur-crd.dtb CHECK_DTBS=1 >>>> DTC [C] arch/arm64/boot/dts/qcom/glymur-crd.dtb >>>> qcom/glymur-crd.dtb: dma-controller@800000 (qcom,glymur-gpi-dma): interrupts: [[0, 588, 4], [0, 589, 4], [0, 590, 4], [0, 591, 4], [0, 592, 4], [0, 593, 4], [0, 594, 4], [0, 595, 4], [0, 596, 4], [0, 597, 4], [0, 598, 4], [0, 599, 4], [2, 129, 4], [2, 130, 4], [2, 131, 4], [2, 132, 4]] is too long >>>> from schema $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# >>>> qcom/glymur-crd.dtb: dma-controller@a00000 (qcom,glymur-gpi-dma): interrupts: [[0, 279, 4], [0, 280, 4], [0, 281, 4], [0, 282, 4], [0, 283, 4], [0, 284, 4], [0, 293, 4], [0, 294, 4], [0, 295, 4], [0, 296, 4], [0, 297, 4], [0, 298, 4], [2, 124, 4], [2, 125, 4], [2, 126, 4], [2, 127, 4]] is too long >>>> from schema $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# >>>> qcom/glymur-crd.dtb: dma-controller@b00000 (qcom,glymur-gpi-dma): interrupts: [[2, 76, 4], [2, 77, 4], [2, 78, 4], [2, 79, 4], [2, 80, 4], [2, 81, 4], [2, 82, 4], [2, 83, 4], [2, 84, 4], [2, 85, 4], [2, 86, 4], [2, 87, 4], [2, 88, 4], [2, 89, 4], [2, 90, 4], [2, 91, 4]] is too long >>>> from schema $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml# >>>> qcom/glymur-crd.dtb: pmic@1 (qcom,pmh0101): led-controller@ee00:compatible:0: 'qcom,pmh0101-flash-led' is not one of ['qcom,pm6150l-flash-led', 'qcom,pm660l-flash-led', 'qcom,pm7550-flash-led', 'qcom,pm8150c-flash-led', 'qcom,pm8150l-flash-led', 'qcom,pm8350c-flash-led', 'qcom,pm8550-flash-led', 'qcom,pmi8998-flash-led'] >>>> from schema $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml# >>>> qcom/glymur-crd.dtb: pmic@1 (qcom,pmh0101): pwm:compatible: 'oneOf' conditional failed, one must be fixed: >>>> ['qcom,pmh0101-pwm', 'qcom,pm8350c-pwm'] is too long >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm660l-lpg', 'qcom,pm8150b-lpg', 'qcom,pm8150l-lpg', 'qcom,pm8350c-pwm', 'qcom,pm8916-pwm', 'qcom,pm8941-lpg', 'qcom,pm8994-lpg', 'qcom,pmc8180c-lpg', 'qcom,pmi632-lpg', 'qcom,pmi8950-pwm', 'qcom,pmi8994-lpg', 'qcom,pmi8998-lpg', 'qcom,pmk8550-pwm'] >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm6150l-lpg'] >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8550-pwm'] >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8937-pwm'] >>>> 'qcom,pm8150l-lpg' was expected >>>> 'qcom,pm8916-pwm' was expected >>>> from schema $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml# >>>> qcom/glymur-crd.dtb: led-controller@ee00 (qcom,pmh0101-flash-led): compatible:0: 'qcom,pmh0101-flash-led' is not one of ['qcom,pm6150l-flash-led', 'qcom,pm660l-flash-led', 'qcom,pm7550-flash-led', 'qcom,pm8150c-flash-led', 'qcom,pm8150l-flash-led', 'qcom,pm8350c-flash-led', 'qcom,pm8550-flash-led', 'qcom,pmi8998-flash-led'] >>>> from schema $id: http://devicetree.org/schemas/leds/qcom,spmi-flash-led.yaml# >>>> qcom/glymur-crd.dtb: /soc@0/arbiter@c400000/spmi@c426000/pmic@1/led-controller@ee00: failed to match any schema with compatible: ['qcom,pmh0101-flash-led', 'qcom,spmi-flash-led'] >>>> qcom/glymur-crd.dtb: pwm (qcom,pmh0101-pwm): compatible: 'oneOf' conditional failed, one must be fixed: >>>> ['qcom,pmh0101-pwm', 'qcom,pm8350c-pwm'] is too long >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm660l-lpg', 'qcom,pm8150b-lpg', 'qcom,pm8150l-lpg', 'qcom,pm8350c-pwm', 'qcom,pm8916-pwm', 'qcom,pm8941-lpg', 'qcom,pm8994-lpg', 'qcom,pmc8180c-lpg', 'qcom,pmi632-lpg', 'qcom,pmi8950-pwm', 'qcom,pmi8994-lpg', 'qcom,pmi8998-lpg', 'qcom,pmk8550-pwm'] >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm6150l-lpg'] >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8550-pwm'] >>>> 'qcom,pmh0101-pwm' is not one of ['qcom,pm8937-pwm'] >>>> 'qcom,pm8150l-lpg' was expected >>>> 'qcom,pm8916-pwm' was expected >>>> from schema $id: http://devicetree.org/schemas/leds/leds-qcom-lpg.yaml# >>>> qcom/glymur-crd.dtb: /soc@0/arbiter@c400000/spmi@c426000/pmic@1/pwm: failed to match any schema with compatible: ['qcom,pmh0101-pwm', 'qcom,pm8350c-pwm'] >>>> >>>> So, we're still missing a few dependencies. >>>> >>>> >>>> Booting the system I get a ton of errors from PCIe in the kernel log: >>>> >>>> debugfs: 'opp:5000000' already exists in 'soc@0-1c00000.pci' >>>> >>>> # dmesg | grep -E 'debugfs: .+ already exists' |wc -l >>>> 508 >>>> >>>> The system does eventually boot, and I was happy to see that we do end >>>> up finding the PCIe devices after all. >>>> >>> I enabled dynamic debug logs and observed that each PCIe platform device >>> probe was deferred approximately 10 times. The probe deferrals resulted in >>> additional OPP debugfs warnings being printed. >>> >>> The PCIe platform device probe was deferred because the PHY driver was not >>> ready - either because the PHY driver was not yet loaded, or because the >>> PHY driver's own probe was also deferred due to its dependency (e.g., >>> 1fd5000.clock-controller) not being ready. This is normal behavior, >>> correct? I also observed that other driver probes were deferred. >>> >>> But I'm not sure why there are more than 300 times probe deferrals on >>> your setup. >> >> I think Bjorn is trying to say that the driver is wrong, because it >> effectively seems to call devm_pm_opp_of_add_table repeatedly >> > Okay, to avoid PCIe driver probe deferrals and the resulting increased OPP > debugfs warnings caused by these deferrals, we plan to move the PHY > properties back from the root port node to the controller device tree > node. Would (roughly) this solve your problems without messing with the DT? diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index fb6bd545f89f..745cca225bcf 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1917,6 +1917,24 @@ static int qcom_pcie_probe(struct platform_device *pdev) pcie->cfg = pcie_cfg; + ret = qcom_pcie_parse_ports(pcie); + if (ret) { + if (ret != -ENODEV) { + dev_err_probe(pci->dev, ret, + "Failed to parse Root Port: %d\n", ret); + goto err_pm_runtime_put; + } + + /* + * In the case of properties not populated in Root Port node, + * fallback to the legacy method of parsing the Host Bridge + * node. This is to maintain DT backwards compatibility. + */ + ret = qcom_pcie_parse_legacy_binding(pcie); + if (ret) + goto err_pm_runtime_put; + } + pcie->parf = devm_platform_ioremap_resource_byname(pdev, "parf"); if (IS_ERR(pcie->parf)) { ret = PTR_ERR(pcie->parf); @@ -1979,24 +1997,6 @@ static int qcom_pcie_probe(struct platform_device *pdev) pp->ops = &qcom_pcie_dw_ops; - ret = qcom_pcie_parse_ports(pcie); - if (ret) { - if (ret != -ENODEV) { - dev_err_probe(pci->dev, ret, - "Failed to parse Root Port: %d\n", ret); - goto err_pm_runtime_put; - } - - /* - * In the case of properties not populated in Root Port node, - * fallback to the legacy method of parsing the Host Bridge - * node. This is to maintain DT backwards compatibility. - */ - ret = qcom_pcie_parse_legacy_binding(pcie); - if (ret) - goto err_pm_runtime_put; - } - platform_set_drvdata(pdev, pcie); ret = dw_pcie_host_init(pp); Konrad