From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=3.0 tests=DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,T_DKIM_INVALID, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DC27C43142 for ; Tue, 31 Jul 2018 07:12:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 05E2C208A2 for ; Tue, 31 Jul 2018 07:12:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=goldelico.com header.i=@goldelico.com header.b="LgKmo+U0" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 05E2C208A2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=goldelico.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732176AbeGaIup (ORCPT ); Tue, 31 Jul 2018 04:50:45 -0400 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.120]:30501 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732036AbeGaIun (ORCPT ); Tue, 31 Jul 2018 04:50:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1533021110; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=TikdyAzBolFa0SaGs+OiDvttfT96078whd7vB+yQROI=; b=LgKmo+U0a5M+rDp7mPB3t04tdHOSQI81GhaxPyjgND5bKR22C6nwVGQt1d6Va9LsKa 9Cdlhbtl+AsYZW6YbB8z2+iuZGIEjsDercBaOj/jPBp+ignUugW7uYrvx4a9NuLxwtFa smRVwvrm3QXGogjKXoDwxX4GkyyUXAKLIhHXZ2kkfFzuv+z5bQxQ8Fqi0LJtwo6e7nri Enf7nnY096GSr4sJNZBCMplG4J6qtzrVQszbdeFtBKGoAahjGsw6Qsup6NYimeedGpnd mxBBRPXsmUFFV84+WW8GffdIA5OFWFmh141xIDTendU4WTk5ZaETLCa8xSHclo2pyxFa FmuA== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1pxICp41QvXLM9PJBRQ" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 43.13 DYNA|AUTH) with ESMTPSA id 6047f4u6V7BiwOl (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Tue, 31 Jul 2018 09:11:44 +0200 (CEST) From: "H. Nikolaus Schaller" To: ladis@linux-mips.org, Sebastian Reichel , Tomi Valkeinen , Marek Belisko , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , Rob Herring , Mark Rutland Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, "H. Nikolaus Schaller" Subject: [PATCH v2 20/32] ARM: dts: omap3-gta04: add devconf0 setup for mcbsp1 clock pins Date: Tue, 31 Jul 2018 09:11:23 +0200 Message-Id: X-Mailer: git-send-email 2.12.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org McBSP1 needs special "pinctrl" for the clocks. Signed-off-by: H. Nikolaus Schaller --- arch/arm/boot/dts/omap3-gta04.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index cbb55b9c3242..39f0eb8f65b0 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -187,6 +187,24 @@ reset-gpios = <&tca6507 0 GPIO_ACTIVE_LOW>; /* W2CBW003 reset through tca6507 */ }; + /* devconf0 setup for mcbsp1 clock pins */ + pinmux_mcbsp1@48002274 { + compatible = "pinctrl-single"; + reg = <0x48002274 4>; /* CONTROL_DEVCONF0 */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,bit-per-mux; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x7>; /* MCBSP1 CLK pinmux */ + #pinctrl-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&mcbsp1_devconf0_pins>; + mcbsp1_devconf0_pins: pinmux_mcbsp1_devconf0_pins { + /* offset bits mask */ + pinctrl-single,bits = <0x00 0x08 0x1c>; /* set MCBSP1_CLKR */ + }; + }; + /* devconf1 setup for tvout pins */ pinmux_tv_out@480022d8 { compatible = "pinctrl-single"; -- 2.12.2