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Wed, 27 Nov 2024 09:11:28 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AR9BRFD029189 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 27 Nov 2024 09:11:27 GMT Received: from [10.151.37.94] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 27 Nov 2024 01:11:23 -0800 Message-ID: Date: Wed, 27 Nov 2024 14:41:20 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH v2 2/3] mtd: rawnand: qcom: Fix onfi param page read Content-Language: en-US To: Manivannan Sadhasivam CC: , , , , , , , , , , References: <20241122085933.2663927-1-quic_mdalam@quicinc.com> <20241122085933.2663927-3-quic_mdalam@quicinc.com> <20241126054135.5v7f5ln5vwc64eys@thinkpad> From: Md Sadre Alam In-Reply-To: <20241126054135.5v7f5ln5vwc64eys@thinkpad> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: TqBkF3t_1oEpfbKdomLQIAR-XW4e8jwL X-Proofpoint-GUID: TqBkF3t_1oEpfbKdomLQIAR-XW4e8jwL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 mlxlogscore=999 clxscore=1015 adultscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 spamscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411270075 On 11/26/2024 11:11 AM, Manivannan Sadhasivam wrote: > On Fri, Nov 22, 2024 at 02:29:32PM +0530, Md Sadre Alam wrote: > > Please change subject to: > > mtd: rawnand: qcom: Fix last codeword read in qcom_param_page_type_exec() Ok > >> For QPIC V2 onwards there is a separate register to read >> last code word "QPIC_NAND_READ_LOCATION_LAST_CW_n". >> >> qcom_param_page_type_exec() is used to read only one code word >> If it will get configure number of code words to 1 in QPIC_NAND_DEV0_CFG0 > > "If it configures the number of..." Ok > >> register then QPIC controller thinks its reading the last code word, >> since we are having separate register to read the last code word, >> we have to configure "QPIC_NAND_READ_LOCATION_LAST_CW_n" register >> to fetch data from QPIC buffer to system memory. >> >> Without this change page read was failing with timeout error >> >> / # hexdump -C /dev/mtd1 >> [ 129.206113] qcom-nandc 1cc8000.nand-controller: failure to read page/oob >> hexdump: /dev/mtd1: Connection timed out >> >> This issue only seen on SDX targets since SDX target used QPICv2. But >> same working on IPQ targets since IPQ used QPICv1. >> >> Cc: stable@vger.kernel.org >> Fixes: 89550beb098e ("mtd: rawnand: qcom: Implement exec_op()") >> Signed-off-by: Md Sadre Alam > > Reviewed-by: Manivannan Sadhasivam > > - Mani > >> --- >> >> Change in [v2] >> >> * Updated commit message >> >> * Added stable kernel tag >> >> * Replaced the buf_count value of 512 with the len in bytes. >> >> Change in [v1] >> >> * Resolved the issue with reading a single code word in the parameter >> page read >> >> drivers/mtd/nand/raw/qcom_nandc.c | 12 ++++++++++-- >> 1 file changed, 10 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c >> index cc59461df72e..31ec3db1246d 100644 >> --- a/drivers/mtd/nand/raw/qcom_nandc.c >> +++ b/drivers/mtd/nand/raw/qcom_nandc.c >> @@ -2859,7 +2859,12 @@ static int qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_ >> const struct nand_op_instr *instr = NULL; >> unsigned int op_id = 0; >> unsigned int len = 0; >> - int ret; >> + int ret, reg_base; >> + >> + reg_base = NAND_READ_LOCATION_0; >> + >> + if (nandc->props->qpic_v2) >> + reg_base = NAND_READ_LOCATION_LAST_CW_0; >> >> ret = qcom_parse_instructions(chip, subop, &q_op); >> if (ret) >> @@ -2911,7 +2916,10 @@ static int qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_ >> op_id = q_op.data_instr_idx; >> len = nand_subop_get_data_len(subop, op_id); >> >> - nandc_set_read_loc(chip, 0, 0, 0, len, 1); > > nandc_set_read_loc() does changes the register offset based on QPIC version. So > what exactly you are trying to fix here? QPICv2 having separate register to copy last code word data from QPIC buffer to Memory. e.g for 2K page nand total code word = 4, so to copy first three code word need to configure NAND_LOCATIONn register , but to copy last code word need to configure NAND_LOCATIONn_LAST register. > > - Mani > >> + if (nandc->props->qpic_v2) >> + nandc_set_read_loc_last(chip, reg_base, 0, len, 1); >> + else >> + nandc_set_read_loc_first(chip, reg_base, 0, len, 1); >> >> if (!nandc->props->qpic_v2) { >> write_reg_dma(nandc, NAND_DEV_CMD_VLD, 1, 0); >> -- >> 2.34.1 >> >