From: "Fontenot, Nathan" <Nathan.Fontenot@amd.com>
To: Huang Rui <ray.huang@amd.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Viresh Kumar <viresh.kumar@linaro.org>,
Shuah Khan <skhan@linuxfoundation.org>,
Borislav Petkov <bp@suse.de>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@kernel.org>,
linux-pm@vger.kernel.org
Cc: Deepak Sharma <deepak.sharma@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
Jinzhou Su <Jinzhou.Su@amd.com>,
Xiaojian Du <Xiaojian.Du@amd.com>,
linux-kernel@vger.kernel.org, x86@kernel.org
Subject: Re: [PATCH v2 04/21] ACPI: CPPC: add cppc enable register function
Date: Tue, 28 Sep 2021 12:06:22 -0500 [thread overview]
Message-ID: <ff0fb071-78fd-87cf-bd6d-c89c25e09d4f@amd.com> (raw)
In-Reply-To: <20210926090605.3556134-5-ray.huang@amd.com>
On 9/26/2021 4:05 AM, Huang Rui wrote:
> From: Jinzhou Su <Jinzhou.Su@amd.com>
>
> Add a new function to enable CPPC feature. This function
> will write Continuous Performance Control package
> EnableRegister field on the processor.
>
> Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> ---
> drivers/acpi/cppc_acpi.c | 48 ++++++++++++++++++++++++++++++++++++++++
> include/acpi/cppc_acpi.h | 5 +++++
> 2 files changed, 53 insertions(+)
>
> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
> index 2efe2ba97d96..b285960c35e7 100644
> --- a/drivers/acpi/cppc_acpi.c
> +++ b/drivers/acpi/cppc_acpi.c
> @@ -1220,6 +1220,54 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
> }
> EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs);
>
> +/**
> + * cppc_set_enable - Set to enable CPPC on the processor by writing the
> + * Continuous Performance Control package EnableRegister feild.
> + * @cpu: CPU for which to enable CPPC register.
> + * @enable: 0 - disable, 1 - enable CPPC feature on the processor.
> + *
> + * Return: 0 for success, -ERRNO or -EIO otherwise.
> + */
> +int cppc_set_enable(int cpu, u32 enable)
This should take a bool instead of u32 for enable, you can only enable
or diable cppc. The only caller I see is in patch 7/21 in which the
enable arg is already a bool that's converted to a u32. This also allows
for the removal of the enable value check.
You should consider merging this patch with patch 7/21. This patch adds
the cppc_set_enable() routine but has no users. The only caller I find is
in patch 7/21.
-Nathan
> +{
> + int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);
> + struct cpc_register_resource *enable_reg;
> + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
> + struct cppc_pcc_data *pcc_ss_data = NULL;
> + int ret = -1;
> +
> + /* check the input value*/
> + if (cpu < 0 || cpu > num_possible_cpus() - 1 || enable > 1)
> + return -ENODEV;
> +
> + if (!cpc_desc) {
> + pr_debug("No CPC descriptor for CPU:%d\n", cpu);
> + return -ENODEV;
> + }
> +
> + enable_reg = &cpc_desc->cpc_regs[ENABLE];
> +
> + if (CPC_IN_PCC(enable_reg)) {
> +
> + if (pcc_ss_id < 0)
> + return -EIO;
> +
> + ret = cpc_write(cpu, enable_reg, enable);
> + if (ret)
> + return ret;
> +
> + pcc_ss_data = pcc_data[pcc_ss_id];
> +
> + down_write(&pcc_ss_data->pcc_lock);
> + /* after writing CPC, transfer the ownership of PCC to platfrom */
> + ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);
> + up_write(&pcc_ss_data->pcc_lock);
> + }
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(cppc_set_enable);
> +
> /**
> * cppc_set_perf - Set a CPU's performance controls.
> * @cpu: CPU for which to set performance controls.
> diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
> index 9f4985b4d64d..3fdae40a75fc 100644
> --- a/include/acpi/cppc_acpi.h
> +++ b/include/acpi/cppc_acpi.h
> @@ -137,6 +137,7 @@ struct cppc_cpudata {
> extern int cppc_get_desired_perf(int cpunum, u64 *desired_perf);
> extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
> extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
> +extern int cppc_set_enable(int cpu, u32 enable);
> extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
> extern bool acpi_cpc_valid(void);
> extern int acpi_get_psd_map(unsigned int cpu, struct cppc_cpudata *cpu_data);
> @@ -157,6 +158,10 @@ static inline int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
> {
> return -ENOTSUPP;
> }
> +static inline int cppc_set_enable(int cpu, u32 enable)
> +{
> + return -ENOTSUPP;
> +}
> static inline int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps)
> {
> return -ENOTSUPP;
> --
> 2.25.1
>
next prev parent reply other threads:[~2021-09-28 17:06 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-26 9:05 [PATCH v2 00/21] cpufreq: introduce a new AMD CPU frequency control mechanism Huang Rui
2021-09-26 9:05 ` [PATCH v2 01/21] x86/cpufreatures: add AMD Collaborative Processor Performance Control feature flag Huang Rui
2021-09-26 9:05 ` [PATCH v2 02/21] x86/msr: add AMD CPPC MSR definitions Huang Rui
2021-09-26 9:05 ` [PATCH v2 03/21] ACPI: CPPC: Check online CPUs for determining _CPC is valid Huang Rui
2021-10-19 16:52 ` Rafael J. Wysocki
2021-10-20 11:15 ` Huang, Ray
2021-09-26 9:05 ` [PATCH v2 04/21] ACPI: CPPC: add cppc enable register function Huang Rui
2021-09-28 17:06 ` Fontenot, Nathan [this message]
2021-10-13 12:28 ` Huang, Ray
2021-10-19 16:59 ` Rafael J. Wysocki
2021-10-20 11:13 ` Huang, Ray
2021-10-20 13:32 ` Rafael J. Wysocki
2021-10-21 3:41 ` Huang, Ray
2021-09-26 9:05 ` [PATCH v2 05/21] cpufreq: amd: introduce a new amd pstate driver to support future processors Huang Rui
2021-09-28 20:40 ` Fontenot, Nathan
2021-10-14 10:14 ` Huang, Ray
2021-09-26 9:05 ` [PATCH v2 06/21] cpufreq: amd: add fast switch function for amd-pstate module Huang Rui
2021-09-26 9:05 ` [PATCH v2 07/21] cpufreq: amd: add acpi cppc function as the backend for legacy processors Huang Rui
2021-09-26 9:05 ` [PATCH v2 08/21] cpufreq: amd: add trace for amd-pstate module Huang Rui
2021-10-06 8:12 ` Giovanni Gherdovich
2021-10-21 10:19 ` Huang, Ray
2021-09-26 9:05 ` [PATCH v2 09/21] cpufreq: amd: add boost mode support for amd-pstate Huang Rui
2021-09-26 9:05 ` [PATCH v2 10/21] cpufreq: amd: add amd-pstate checking support check attribute Huang Rui
2021-09-28 21:24 ` Fontenot, Nathan
2021-10-14 10:26 ` Huang, Ray
2021-09-26 9:05 ` [PATCH v2 11/21] cpufreq: amd: add amd-pstate frequencies attributes Huang Rui
2021-09-28 21:35 ` Fontenot, Nathan
2021-10-14 10:35 ` Huang, Ray
2021-09-26 9:05 ` [PATCH v2 12/21] cpufreq: amd: add amd-pstate performance attributes Huang Rui
2021-09-26 9:05 ` [PATCH v2 13/21] cpupower: add AMD P-state capability flag Huang Rui
2021-09-26 9:05 ` [PATCH v2 14/21] cpupower: add the function to check amd-pstate enabled Huang Rui
2021-09-26 9:05 ` [PATCH v2 15/21] cpupower: initial AMD P-state capability Huang Rui
2021-09-26 9:06 ` [PATCH v2 16/21] cpupower: add the function to get the sysfs value from specific table Huang Rui
2021-09-26 9:06 ` [PATCH v2 17/21] cpupower: add amd-pstate sysfs definition and access helper Huang Rui
2021-09-26 9:06 ` [PATCH v2 18/21] cpupower: enable boost state support for amd-pstate module Huang Rui
2021-09-26 9:06 ` [PATCH v2 19/21] cpupower: move print_speed function into misc helper Huang Rui
2021-09-26 9:06 ` [PATCH v2 20/21] cpupower: print amd-pstate information on cpupower Huang Rui
2021-09-26 9:06 ` [PATCH v2 21/21] Documentation: amd-pstate: add amd-pstate driver introduction Huang Rui
2021-10-13 16:23 ` Giovanni Gherdovich
2021-10-14 11:30 ` Huang, Ray
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