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Fri, 13 Nov 2026 02:42:20 -0800 (PST) Received: from [10.217.216.70] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3797f98b9b2sm6363256eec.6.2026.11.13.02.42.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Nov 2026 02:42:19 -0800 (PST) Message-ID: Date: Fri, 13 Nov 2026 16:12:07 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 01/10] dt-bindings: ptp: Document the TSCSS on Qualcomm SA8775P and QCS8300 SoCs To: Krzysztof Kozlowski Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. Miller" , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , Eric Dumazet , Abel Vesa , Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org References: <20261108-tscss-v2-0-d5f575010427@oss.qualcomm.com> <20261108-tscss-v2-1-d5f575010427@oss.qualcomm.com> <20261109-qualified-pristine-newt-ba1c0c@quoll> <2cd4da54-1dd2-424d-a9ba-e3e4fdad502e@kernel.org> Content-Language: en-US From: Imran Shaik In-Reply-To: <2cd4da54-1dd2-424d-a9ba-e3e4fdad502e@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTEzMDA0MiBTYWx0ZWRfX0dz91++vhs5t GkTzIAxBdV/vhLuu0D/eyth4izP4DIY3xVZ5VKOlCY60Lk1JphJnsthL4DZRiuVZDTdk+9pT5Ri ROEZuaTxuiBhPF6U3NOT6vobQ75GdXOJC2GF2S3Z010+7NqMtyw4hmWIW9Vac00Ii0Sc+E1FfIG 8huzxifvO+oFbdiHc4vz7lHRR0+DT7zVwKwghZ1k/BICMBKk78XIRu/t0r1W1crkhrpEDB5vY/k NYzlsdrCmTZoB5QPrsWHlWUJr7velILuLlI0Lspjj/4TVK2WX2+UJSchAf6pD1u1sSKpKZuoNYK Lhe052DaKdz0HyycMmvNXjcZZgDm7dkfubCISAvLBHa1azTpNXjGvkAf+GAnxk9hFWYyb2WCcTW z/hn2go6tr/xrSZWQC8YlPpPMxrMMGpWlnfQGo41sS9jHeougQP2swVnNrPDy2gfjPtjHZdqjWC WUQxdqYwLUzLyELS2BQ== X-Proofpoint-Spam-Info: AW1haW4tMjYxMTEzMDA0MiBTYWx0ZWRfX6SMQ1TtVXEKP 461dxC47fKs9SYDv+hTpN59+isBPIvCb6oEsMOZco3w+gqT6Y3qh8i/+3M5XnIyJ1LJXTm6rNx3 DTbQs7oaWh9qSfAs8IDdup1nNZMVNLs= X-Proofpoint-ORIG-GUID: Mp5KKNDySDcRci4KGfu9AmGBAZyuuIrt X-Authority-Analysis: v=2.4 cv=Vqq2kO2n c=1 sm=1 tr=0 ts=6af6e98d cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=A8zP-s-B-IGqv6UKJQEA:9 a=QEXdDO2ut3YA:10 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-GUID: Mp5KKNDySDcRci4KGfu9AmGBAZyuuIrt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-13_03,2026-11-11_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 impostorscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611130042 On 13-11-2026 12:33 pm, Krzysztof Kozlowski wrote: > On 12/11/2026 10:31, Imran Shaik wrote: >>>> +allOf: >>>> + - if: >>>> + properties: >>>> + reg-names: >>>> + contains: >>>> + const: etu >>> >>> Reason for same devices with different address space details should be >>> provided somewhere, preferrably in description. Assuming in the first >>> place, that this stays because how two devices can be basically >>> identical (same compatible) if they have different programming >>> interface? >>> >> >> TSCSS is a single hardware device, split into two sub-blocks - TSC and >> ETU, each with its own register address. Every SoC with this compatible >> has both blocks in hardware. > > This is not what the binding said. > >> >> What changes is whether the vendor/board actually wires up the ETU's >> external event. The ETU block captures a timestamp from the TSC block >> when an external event fires one of the ETU slices, which are driven >> through board-level GPIO/IRQs. If a board doesn't wire any slice, >> there's nothing in the ETU region for Linux to use. > > This is not what the binding said. The binding said there are different > types of devices, one with etu and one without. Look, easy to spot: > > + reg: > + minItems: 1 > + maxItems: 2 > Sure, I will drop this reg handling, and add all the register spaces support by default in next series. Thanks, Imran