From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH] phy: qualcomm: phy-qcom-eusb2-repeater: Fix SMB Power leakage issue
Date: Tue, 13 Oct 2026 14:07:46 +0530 [thread overview]
Message-ID: <ff46d549-a766-4263-9bcf-caf3ec17be3a@oss.qualcomm.com> (raw)
In-Reply-To: <as0BPGd_BJivizEW@debian>
On 10/12/2026 9:20 PM, Manivannan Sadhasivam wrote:
> On Thu, Sep 17, 2026 at 03:10:09PM +0530, Krishna Kurapati wrote:
>> On Glymur, it is observed that although the exit call is done, there is a
>> power leakage seen on SMB2370 charger (which embeds the eUSB2 module as
>> well). As per recommendation of HW team, disable the repeater during the
>> exit call to prevent this power leakage.
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> ---
>> RB tag from Konrad received on an internal reivew.
>> ---
>> drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c b/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
>> index efeec4709a15..7db2fbff6163 100644
>> --- a/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
>> +++ b/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
>> @@ -229,7 +229,10 @@ static int eusb2_repeater_set_mode(struct phy *phy,
>> static int eusb2_repeater_exit(struct phy *phy)
>> {
>> struct eusb2_repeater *rptr = phy_get_drvdata(phy);
>> + struct regmap *regmap = rptr->regmap;
>> + u32 base = rptr->base;
>>
>> + regmap_write(regmap, base + EUSB2_EN_CTL1, 0);
>
> Can you safely write 0 to this register? Since init() just sets EUSB2_RPTR_EN,
> wondering if you need to clear that bit only.
>
As per the HW spec, only one bit is exposed and the reset value of this
register is 0x00. So writing 0x00 to this register is valid.
Regards,
Krishna,
prev parent reply other threads:[~2026-10-13 8:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 9:40 Krishna Kurapati
2026-09-17 15:42 ` Abel Vesa
2026-10-12 15:50 ` Manivannan Sadhasivam
2026-10-13 8:37 ` Krishna Kurapati [this message]
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