From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 463242DC79A; Wed, 30 Apr 2025 06:53:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745996022; cv=none; b=UXXeGEtDCXbUyt3LFWhnv+OCHY5fz1Ww+FSw9d7lqM9WZpx6DS/oFJnpAOInbjJuceKSSIyDow9P2H2TOSB2RvUw9wi+A+a8dpDNjUrIepxIs5takav6+7CwYCx8qpyr7Zhswd1Y7k1FDaYP2LM6JSC62OojHXbBi0s5Cm8oRI0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745996022; c=relaxed/simple; bh=4W23L1YMHzHI8bHYXsciR+GG9RxlGIDjYMw4Dj5aROA=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=QsxFQ71qZ89x8RMR2NvOztFNi9CF7LDr+u8l+b+JToMkBDraxJGexScQ2dM2POKPXUTJdivGV7pV6X2uhMAUX4YgsoT5EPHZe3pzAu0VgjFxQpBMkAg4xLB5auXHalrcs+EpGo9Xrb1TPmuhACnkNVNO6ipDqYeHfhJHABNotL4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=c02ZtOQh; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="c02ZtOQh" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53TLZHAV026546; Wed, 30 Apr 2025 08:53:27 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= jVtPCT8eFXzdGwPm+U66fdp54fvnuu1A/lJQ6a7bhyc=; b=c02ZtOQh0CQXnY1M OFcSI0bmyVs6qG0ukA+stuYLuYZ+Lazp63j4EhxhA47fiNBBjp5HBij8OhIVNyh4 EABfJDKC1xweRhaLYlD2HQ8N7dCb+RRego3/enjR0QoyMY1q5RRU1cIZWnlgEtVi AHT82Zd6htsghgMxS6jrNJWypb5wUvhptpzYCyFSEUm+YuBj6zwAkq2En+ah+eM8 4/wE/JHKbRFJrfMP2YU3ywqyabMe7EzlrbtmJU8hF4GxNe3TCobsHPSaV2QVk7l+ vL4K8iPM9wrD4RLBh/t2Tv+x40uLwr3NSVzTBl7HGa4M3TX3WdgbnEtZ8ddO3DGa wpm0/w== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 46b6tmsfk7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Apr 2025 08:53:26 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id DD8FE4002D; Wed, 30 Apr 2025 08:52:29 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 79DF9A476FF; Wed, 30 Apr 2025 08:51:48 +0200 (CEST) Received: from [10.48.86.79] (10.48.86.79) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 30 Apr 2025 08:51:47 +0200 Message-ID: Date: Wed, 30 Apr 2025 08:51:47 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/3] ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board To: Goran Radenovic , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?UTF-8?B?QsO2cmdlIFN0csO8bXBmZWw=?= , Maxime Coquelin CC: , , , References: <20250326094429.2397365-1-goran.radni@gmail.com> <20250326094429.2397365-4-goran.radni@gmail.com> Content-Language: en-US From: Alexandre TORGUE In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-30_02,2025-04-24_02,2025-02-21_01 Hi Goran, On 4/7/25 11:14, Goran Radenovic wrote: > Hi, > > thank You very much for the feedback so far. Do You have any update for me? > Series is correct and I'm close to merge it. Can you please resend and split this patch to get the MAINTAINER update in a separate patch ? Thanks in advance alex > Best regards > Goran > > On 26.03.25 10:44, Goran Rađenović wrote: >> Add support for Ultratronik's stm32mp157c fly board. This board embeds >> a STM32MP157c SOC and 1GB of DDR3. Several connections are available on >> this boards: 2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART, >> SDcard, RJ45, ... >> >> This patch enables basic support for a kernel boot - SD-card or eMMC. >> >> Signed-off-by: Goran Rađenović >> --- >>   MAINTAINERS                                   |    6 + >>   arch/arm/boot/dts/st/Makefile                 |    3 +- >>   .../boot/dts/st/stm32mp157c-ultra-fly-sbc.dts | 1155 +++++++++++++++++ >>   3 files changed, 1163 insertions(+), 1 deletion(-) >>   create mode 100644 arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 3b5fa8436987..11fa9f2f9f55 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -24341,6 +24341,12 @@ S:    Maintained >>   F:    drivers/usb/common/ulpi.c >>   F:    include/linux/ulpi/ >> +ULTRATRONIK BOARD SUPPORT >> +M:    Goran Rađenović >> +M:    Börge Strümpfel >> +S:    Maintained >> +F:    arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts >> + >>   UNICODE SUBSYSTEM >>   M:    Gabriel Krisman Bertazi >>   L:    linux-fsdevel@vger.kernel.org >> diff --git a/arch/arm/boot/dts/st/Makefile >> b/arch/arm/boot/dts/st/Makefile >> index b7d5d305cbbe..270d1c699e1a 100644 >> --- a/arch/arm/boot/dts/st/Makefile >> +++ b/arch/arm/boot/dts/st/Makefile >> @@ -66,7 +66,8 @@ dtb-$(CONFIG_ARCH_STM32) += \ >>       stm32mp157c-lxa-tac-gen2.dtb \ >>       stm32mp157c-odyssey.dtb \ >>       stm32mp157c-osd32mp1-red.dtb \ >> -    stm32mp157c-phycore-stm32mp1-3.dtb >> +    stm32mp157c-phycore-stm32mp1-3.dtb \ >> +    stm32mp157c-ultra-fly-sbc.dtb >>   dtb-$(CONFIG_ARCH_U8500) += \ >>       ste-snowball.dtb \ >>       ste-hrefprev60-stuib.dtb \ >> diff --git a/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts >> b/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts >> new file mode 100644 >> index 000000000000..1778f5a527ba >> --- /dev/null >> +++ b/arch/arm/boot/dts/st/stm32mp157c-ultra-fly-sbc.dts >> @@ -0,0 +1,1155 @@ >> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) >> +/* >> + * Copyright (C) Ultratronik GmbH 2024-2025 - All Rights Reserved >> + */ >> + >> +/dts-v1/; >> +#include "stm32mp157.dtsi" >> +#include "stm32mp15xc.dtsi" >> +#include "stm32mp15-pinctrl.dtsi" >> +#include "stm32mp15xxac-pinctrl.dtsi" >> +#include >> +#include >> +#include >> + >> +/ { >> +    model = "STM STM32MP15x Ultratronik MMI_A7 board"; >> +    compatible = "ultratronik,stm32mp157c-ultra-fly-sbc", >> "st,stm32mp157"; >> + >> +    aliases { >> +        ethernet0 = ðernet0; >> +        serial0 = &uart4; >> +        serial1 = &uart5; >> +        serial2 = &uart7; >> +        serial3 = &usart1; >> +    }; >> + >> +    chosen { >> +        stdout-path = "serial0:115200n8"; >> +    }; >> + >> +    memory@c0000000 { >> +        device_type = "memory"; >> +        reg = <0xC0000000 0x40000000>; >> +    }; >> + >> +    usb_otg_vbus: regulator-0 { >> +        compatible = "regulator-fixed"; >> +        regulator-name = "usb_otg_vbus"; >> +        regulator-min-microvolt = <5000000>; >> +        regulator-max-microvolt = <5000000>; >> +        gpio = <&gpioh 3 GPIO_ACTIVE_HIGH>; >> +        enable-active-high; >> +    }; >> + >> +    reserved-memory { >> +        #address-cells = <1>; >> +        #size-cells = <1>; >> +        ranges; >> + >> +        retram: retram@38000000 { >> +            compatible = "shared-dma-pool"; >> +            reg = <0x38000000 0x10000>; >> +            no-map; >> +        }; >> + >> +        mcuram: mcuram@30000000 { >> +            compatible = "shared-dma-pool"; >> +            reg = <0x30000000 0x40000>; >> +            no-map; >> +        }; >> + >> +        mcuram2: mcuram2@10000000 { >> +            compatible = "shared-dma-pool"; >> +            reg = <0x10000000 0x40000>; >> +            no-map; >> +        }; >> + >> +        vdev0vring0: vdev0vring0@10040000 { >> +            compatible = "shared-dma-pool"; >> +            reg = <0x10040000 0x2000>; >> +            no-map; >> +        }; >> + >> +        vdev0vring1: vdev0vring1@10042000 { >> +            compatible = "shared-dma-pool"; >> +            reg = <0x10042000 0x2000>; >> +            no-map; >> +        }; >> + >> +        vdev0buffer: vdev0buffer@10044000 { >> +            compatible = "shared-dma-pool"; >> +            reg = <0x10044000 0x4000>; >> +            no-map; >> +        }; >> + >> +        gpu_reserved: gpu@f8000000 { >> +            reg = <0xf8000000 0x8000000>; >> +            no-map; >> +        }; >> +    }; >> + >> +    leds: leds { >> +        compatible = "gpio-leds"; >> + >> +        led0{ >> +            label = "buzzer"; >> +            gpios = <&gpiof 2 GPIO_ACTIVE_HIGH>; >> +            default-state = "off"; >> +            linux,default-trigger = "none"; >> +        }; >> + >> +        led1 { >> +            label = "led1"; >> +            gpios = <&gpioa 12 GPIO_ACTIVE_LOW>; >> +            default-state = "off"; >> +        }; >> + >> +        led2 { >> +            label = "led2"; >> +            gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; >> +            default-state = "off"; >> +        }; >> + >> +        led3 { >> +            label = "led3"; >> +            gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; >> +            default-state = "off"; >> +        }; >> +    }; >> + >> +    gpio_keys: gpio-keys { >> +        compatible = "gpio-keys"; >> + >> +        key-1 { >> +            label = "KEY1"; >> +            gpios = <&gpiod 1 GPIO_ACTIVE_HIGH>; >> +            wakeup-source; >> +            linux,code = <2>; >> +        }; >> + >> +        key-2 { >> +            label = "KEY2"; >> +            gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>; >> +            wakeup-source; >> +            linux,code = <3>; >> +        }; >> +    }; >> +}; >> + >> +&adc { >> +    pinctrl-names = "default"; >> +    pinctrl-0 = <&adc1_ux_ain_pins_a>; >> +    vdd-supply = <&vdd>; >> +    vdda-supply = <&vdd>; >> +    vref-supply = <&vrefbuf>; >> +    status = "okay"; >> + >> +    adc1: adc@0 { >> +        st,min-sample-time-nsecs = <5000>; >> +        st,adc-channels = <0 1 6 13>; /* ANA0 ANA1 PF12 PC3 */ >> +        status = "okay"; >> +    }; >> + >> +    adc2: adc@100 { >> +        st,adc-channels = <0 1 12>; /* ANA0 ANA1 INT_TEMP*/ >> +        st,min-sample-time-nsecs = <10000>; >> +        status = "okay"; >> + >> +        channel@12 { >> +            reg = <12>;  /* Channel 12 = internal temperature sensor */ >> +            label = "internal_temp"; >> +        }; >> +    }; >> +}; >> + >> +&dac { >> +    pinctrl-names = "default"; >> +    pinctrl-0 = <&dac_ux_ch1_pins_a &dac_ux_ch2_pins_a>; >> +    vref-supply = <&vrefbuf>; >> +    status = "okay"; >> + >> +    dac1: dac@1 { >> +        status = "okay"; >> +    }; >> + >> +    dac2: dac@2 { >> +        status = "okay"; >> +    }; >> +}; >> + >> +&dts { >> +    compatible = "st,stm32-thermal"; >> +    status = "okay"; >> +}; >> + >> +ðernet0 { >> +    status = "okay"; >> +    pinctrl-0 = <ðernet0_ux_rgmii_pins_a>; >> +    pinctrl-1 = <ðernet0_ux_rgmii_pins_sleep_a>; >> +    pinctrl-names = "default", "sleep"; >> +    phy-mode = "rgmii-id"; >> +    max-speed = <1000>; >> +    phy-handle = <&phy1>; >> + >> +    mdio { >> +        #address-cells = <1>; >> +        #size-cells = <0>; >> +        compatible = "snps,dwmac-mdio"; >> +        phy1: ethernet-phy@1 { >> +            reg = <1>; >> +            interrupt-parent = <&gpiod>; >> +            interrupts = <0 IRQ_TYPE_EDGE_FALLING>; >> +        }; >> +    }; >> +}; >> + >> +&gpioa { >> +    gpio-line-names = >> +    "#PMIC_IRQ", "", "", "", "DAC1", "DAC2", "", "", >> +    "", "", "OTG_ID", "TIM1_4", "#LED1", "#LED2", "#LED3", ""; >> +}; >> + >> +&gpiob { >> +    gpio-line-names = >> +    "", "", "", "", "", "", "", "", >> +    "", "", "", "", "", "", "", ""; >> +}; >> + >> +&gpioc { >> +    gpio-line-names = >> +    "#AMP_SD", "", "", "ANA5", "", "", "", "", >> +    "", "", "", "", "", "PMIC_WAKEUP", "", ""; >> +}; >> + >> +&gpiod { >> +    gpio-line-names = >> +    "#G_INT", "#TASTER1", "", "", "GPIO1", "GPIO2", "", "#TASTER2", >> +    "", "", "", "", "", "", "TIM4_3", "TIM4_4"; >> +}; >> + >> +&gpioe { >> +    gpio-line-names = >> +    "", "", "", "", "", "", "", "", >> +    "", "", "PWM2", "", "", "", "", ""; >> +}; >> + >> +&gpiof { >> +    gpio-line-names = >> +    "#SD1_CD", "SD1_WP", "BUZZER", "#DISP_POW", "BKL_POW", >> "#CAM_RES", "", "", >> +    "", "TIM17_1N", "", "CAM_PWDN", "ANA6", "ENA_USB", "", ""; >> +}; >> + >> +&gpiog { >> +    gpio-line-names = >> +    "#ESP_RES", "#ESP_BOOT", "GPIO3", "GPIO4", "", "", "", "", >> +    "", "#TOUCH_IRQ", "", "", "", "", "", "#PCAP_RES"; >> +}; >> + >> +&gpioh { >> +    gpio-line-names = >> +    "", "CAM_LED", "", "USB_OTG_PWR", "", "USB_OTG_OC", "", "", >> +    "", "", "", "", "", "", "", ""; >> +}; >> + >> +&gpioi { >> +    gpio-line-names = >> +    "BKL_PWM", "", "", "", "", "", "", "", >> +    "#SPI_CS0", "", "", "#SPI_CS1", "", "", "", ""; >> +}; >> + >> +&gpioj { >> +    gpio-line-names = >> +    "", "", "", "", "", "", "", "", >> +    "", "", "", "", "", "", "", ""; >> +}; >> + >> +&gpiok { >> +    gpio-line-names = >> +    "", "", "", "", "", "", "", "", >> +    "", "", "", "", "", "", "", ""; >> +}; >> + >> +&gpioz { >> +    gpio-line-names = >> +    "", "", "", "#SPI_CS2", "", "", "", "", >> +    "", "", "", "", "", "", "", ""; >> +}; >> + >> +&gpu { >> +    status = "okay"; >> +}; >> + >> +&i2c1 { >> +    pinctrl-names = "default", "sleep"; >> +    pinctrl-0 = <&i2c1_ux_pins_a>; >> +    pinctrl-1 = <&i2c1_ux_pins_sleep_a>; >> +    i2c-scl-rising-time-ns = <100>; >> +    i2c-scl-falling-time-ns = <7>; >> +    status = "okay"; >> +    /delete-property/dmas; >> +    /delete-property/dma-names; >> + >> +    rtc@32 { >> +        compatible = "epson,rx8900"; >> +        reg = <0x32>; >> +        epson,vdet-disable; >> +        trickle-diode-disable; >> +    }; >> +}; >> + >> +&i2c4 { >> +    pinctrl-names = "default", "sleep"; >> +    pinctrl-0 = <&i2c4_ux_pins_a>; >> +    pinctrl-1 = <&i2c4_ux_pins_sleep_a>; >> +    i2c-scl-rising-time-ns = <185>; >> +    i2c-scl-falling-time-ns = <20>; >> +    status = "okay"; >> +    /delete-property/dmas; >> +    /delete-property/dma-names; >> + >> +    pmic: pmic@33 { >> +        compatible = "st,stpmic1"; >> +        reg = <0x33>; >> +        interrupts-extended = <&exti 0 IRQ_TYPE_EDGE_FALLING>; >> +        interrupt-controller; >> +        #interrupt-cells = <2>; >> + >> +        regulators { >> +            compatible = "st,stpmic1-regulators"; >> + >> +            ldo1-supply = <&v3v3>; >> +            ldo3-supply = <&vdd_ddr>; >> +            ldo6-supply = <&v3v3>; >> +            pwr_sw1-supply = <&bst_out>; >> +            pwr_sw2-supply = <&bst_out>; >> + >> +            vddcore: buck1 { >> +                regulator-name = "vddcore"; >> +                regulator-min-microvolt = <1250000>; >> +                regulator-max-microvolt = <1350000>; >> +                regulator-always-on; >> +                regulator-initial-mode = <0>; >> +                regulator-over-current-protection; >> +            }; >> + >> +            vdd_ddr: buck2 { >> +                regulator-name = "vdd_ddr"; >> +                regulator-min-microvolt = <1350000>; >> +                regulator-max-microvolt = <1350000>; >> +                regulator-always-on; >> +                regulator-initial-mode = <0>; >> +                regulator-over-current-protection; >> +            }; >> + >> +            vdd: buck3 { >> +                regulator-name = "vdd"; >> +                regulator-min-microvolt = <3300000>; >> +                regulator-max-microvolt = <3300000>; >> +                regulator-always-on; >> +                st,mask-reset; >> +                regulator-initial-mode = <0>; >> +                regulator-over-current-protection; >> +            }; >> + >> +            v3v3: buck4 { >> +                regulator-name = "v3v3"; >> +                regulator-min-microvolt = <3300000>; >> +                regulator-max-microvolt = <3300000>; >> +                regulator-always-on; >> +                regulator-over-current-protection; >> +                regulator-initial-mode = <0>; >> +            }; >> + >> +            vtt_ddr: ldo3 { >> +                regulator-name = "vtt_ddr"; >> +                regulator-min-microvolt = <500000>; >> +                regulator-max-microvolt = <750000>; >> +                regulator-always-on; >> +                regulator-over-current-protection; >> +            }; >> + >> +            vdd_usb: ldo4 { >> +                regulator-name = "vdd_usb"; >> +                regulator-min-microvolt = <3300000>; >> +                regulator-max-microvolt = <3300000>; >> +                regulator-always-on; >> +                interrupts = ; >> +            }; >> + >> +            v1v8: ldo6 { >> +                regulator-name = "v1v8"; >> +                regulator-min-microvolt = <1600000>;/* offset +200 mv >> ??? */ >> +                regulator-max-microvolt = <1600000>;/* real 1800000 */ >> +                regulator-always-on; >> +                interrupts = ; >> +            }; >> + >> +            vref_ddr: vref_ddr { >> +                regulator-name = "vref_ddr"; >> +                regulator-always-on; >> +            }; >> + >> +            bst_out: boost { >> +                regulator-name = "bst_out"; >> +                interrupts = ; >> +            }; >> + >> +            vbus_otg: pwr_sw1 { >> +                regulator-name = "vbus_otg"; >> +                interrupts = ; >> +                regulator-active-discharge = <1>; >> +             }; >> + >> +             vbus_sw: pwr_sw2 { >> +                regulator-name = "vbus_sw"; >> +                interrupts = ; >> +                regulator-active-discharge = <1>; >> +             }; >> +        }; >> +    }; >> +}; >> + >> +&iwdg2 { >> +    timeout-sec = <32>; >> +    status = "okay"; >> +}; >> + >> +&m_can2 { >> +    pinctrl-names = "default", "sleep"; >> +    pinctrl-0 = <&m_can2_ux_pins_a>; >> +    pinctrl-1 = <&m_can2_ux_sleep_pins_a>; >> +    status = "okay"; >> +}; >> + >> +&pinctrl { >> + >> +    adc1_ux_ain_pins_a: adc1-ux-ain-0 { >> +        pins { >> +            pinmux = , /* ADC1 in6 */ >> +                 ; /* ADC2 in13 */ >> +        }; >> +    }; >> + >> +    dac_ux_ch1_pins_a: dac-ux-ch1-0 { >> +        pins { >> +            pinmux = ; >> +        }; >> +    }; >> + >> +    dac_ux_ch2_pins_a: dac-ux-ch2-0 { >> +        pins { >> +            pinmux = ; >> +        }; >> +    }; >> + >> +    ethernet0_ux_rgmii_pins_a: rgmii-ux-0 { >> +        pins1 { >> +            pinmux = , /* >> ETH_RGMII_CLK125 */ >> +                 , /* ETH_RGMII_GTX_CLK */ >> +                 , /* ETH_RGMII_TXD0 */ >> +                 , /* ETH_RGMII_TXD1 */ >> +                 , /* ETH_RGMII_TXD2 */ >> +                 , /* ETH_RGMII_TXD3 */ >> +                 ; /* ETH_RGMII_TX_CTL */ >> +            bias-disable; >> +            drive-push-pull; >> +            slew-rate = <2>; >> +        }; >> +        pins2 { >> +            pinmux = , /* ETH_RGMII_RXD0 */ >> +                 , /* ETH_RGMII_RXD1 */ >> +                 , /* ETH_RGMII_RXD2 */ >> +                 , /* ETH_RGMII_RXD3 */ >> +                 , /* ETH_RGMII_RX_CLK */ >> +                 ; /* ETH_RGMII_RX_CTL */ >> +            bias-disable; >> +        }; >> +        pins3 { >> +            pinmux = ; /* ETH_MDC */ >> +            bias-disable; >> +            drive-push-pull; >> +            slew-rate = <0>; >> +        }; >> +        pins4 { >> +            pinmux = ; /* ETH_MDIO */ >> +            bias-disable; >> +            drive-open-drain; >> +            slew-rate = <0>; >> +        }; >> +    }; >> + >> +    ethernet0_ux_rgmii_pins_sleep_a: rgmii-ux-sleep-0 { >> +        pins1 { >> +            pinmux = , /* >> ETH_RGMII_CLK125 */ >> +                 , /* ETH_RGMII_GTX_CLK */ >> +                 , /* ETH_RGMII_TXD0 */ >> +                 , /* ETH_RGMII_TXD1 */ >> +                 , /* ETH_RGMII_TXD2 */ >> +                 , /* ETH_RGMII_TXD3 */ >> +                 , /* ETH_RGMII_TX_CTL */ >> +                 , /* ETH_MDIO */ >> +                 , /* ETH_MDC */ >> +                 , /* ETH_RGMII_RXD0 */ >> +                 , /* ETH_RGMII_RXD1 */ >> +                 , /* ETH_RGMII_RXD2 */ >> +                 , /* ETH_RGMII_RXD3 */ >> +                 , /* ETH_RGMII_RX_CLK */ >> +                 ; /* ETH_RGMII_RX_CTL */ >> +        }; >> +    }; >> + >> +    i2c1_ux_pins_a: i2c1-0 { >> +        pins { >> +            pinmux = , /* I2C1_SCL */ >> +                 ; /* I2C1_SDA */ >> +            bias-disable; >> +            drive-open-drain; >> +            slew-rate = <0>; >> +        }; >> +    }; >> + >> +    i2c1_ux_pins_sleep_a: i2c1-1 { >> +        pins { >> +            pinmux = , /* I2C1_SCL */ >> +                 ; /* I2C1_SDA */ >> +        }; >> +    }; >> + >> +    m_can2_ux_pins_a: m-can2-ux-0 { >> +        pins1 { >> +            pinmux = ; /* CAN1_TX */ >> +            slew-rate = <0>; >> +            drive-push-pull; >> +            bias-disable; >> +        }; >> + >> +        pins2 { >> +            pinmux = ; /* CAN1_RX */ >> +            bias-disable; >> +        }; >> +    }; >> + >> +    m_can2_ux_sleep_pins_a: m-can2-ux-sleep-0 { >> +        pins { >> +            pinmux = , /* CAN1_TX */ >> +                 ; /* CAN1_RX */ >> +        }; >> +    }; >> +    pwm1_ux_pins_a: pwm1-0 { >> +        pins { >> +            pinmux = , /* TIM1_CH4 */ >> +                 ; /* TIM1_CH2N */ >> +            bias-pull-down; >> +            drive-push-pull; >> +            slew-rate = <0>; >> +        }; >> +    }; >> + >> +    pwm1_ux_sleep_pins_a: pwm1-sleep-0 { >> +        pins { >> +            pinmux = , /* TIM1_CH4 */ >> +                 ; /* TIM1_CH2N */ >> +        }; >> +    }; >> + >> +    pwm4_ux_pins_a: pwm4-0 { >> +        pins { >> +            pinmux = , /* TIM4_CH3 */ >> +                 ; /* TIM4_CH4 */ >> +            bias-disable; >> +        }; >> +    }; >> + >> +    pwm4_ux_sleep_pins_a: pwm4-sleep-0 { >> +        pins { >> +            pinmux = , /* TIM4_CH3 */ >> +                 ; /* TIM4_CH4 */ >> +        }; >> +    }; >> + >> +    pwm5_ux_pins_a: pwm5-0 { >> +        pins { >> +            pinmux = ; /* TIM5_CH4 */ >> +            bias-pull-down; >> +            drive-push-pull; >> +            slew-rate = <0>; >> +        }; >> +    }; >> + >> +    pwm5_ux_sleep_pins_a: pwm5-sleep-0 { >> +        pins { >> +            pinmux = ; /* TIM5_CH4 */ >> +        }; >> +    }; >> + >> +    pwm17_ux_pins_a: pwm17-0 { >> +        pins { >> +            pinmux = ; /* TIM17_CH1N */ >> +            bias-pull-down; >> +            drive-push-pull; >> +            slew-rate = <0>; >> +        }; >> +    }; >> + >> +    pwm17_ux_sleep_pins_a: pwm17-sleep-0 { >> +        pins { >> +            pinmux = ; /* TIM17_CH1N */ >> +        }; >> +    }; >> + >> +    qspi_bk1_ux_pins_a: qspi-bk1-ux-0 { >> +        pins1 { >> +            pinmux = , /* QSPI_BK1_IO0 */ >> +                 , /* QSPI_BK1_IO1 */ >> +                 , /* QSPI_BK1_IO2 */ >> +                 ; /* QSPI_BK1_IO3 */ >> +            bias-disable; >> +            drive-push-pull; >> +            slew-rate = <1>; >> +        }; >> + >> +        pins2 { >> +            pinmux = ; /* QSPI_BK1_NCS */ >> +            bias-pull-up; >> +            drive-push-pull; >> +            slew-rate = <1>; >> +        }; >> +    }; >> + >> +    qspi_bk1_ux_sleep_pins_a: qspi-bk1-ux-sleep-0 { >> +        pins { >> +            pinmux = , /* QSPI_BK1_IO0 */ >> +                 , /* QSPI_BK1_IO1 */ >> +                 , /* QSPI_BK1_IO2 */ >> +                 , /* QSPI_BK1_IO3 */ >> +                 ; /* QSPI_BK1_NCS */ >> +        }; >> +    }; >> + >> +    qspi_clk_ux_pins_a: qspi-clk_ux-0 { >> +        pins { >> +            pinmux = ; /* QSPI_CLK */ >> +            bias-disable; >> +            drive-push-pull; >> +            slew-rate = <3>; >> +        }; >> +    }; >> + >> +    qspi_clk_ux_sleep_pins_a: qspi-clk-ux-sleep-0 { >> +        pins { >> +            pinmux = ; /* QSPI_CLK */ >> +        }; >> +    }; >> + >> +    sai2a_ux_pins_a: sai2a-0 { >> +        pins { >> +            pinmux = , /* SAI2_SCK_A */ >> +                 , /* SAI2_SD_A */ >> +                 , /* SAI2_FS_A */ >> +                 ; /* SAI2_MCLK_A */ >> +            slew-rate = <0>; >> +            drive-push-pull; >> +            bias-disable; >> +        }; >> +    }; >> + >> +    sai2a_ux_sleep_pins_a: sai2a-1 { >> +        pins { >> +            pinmux = , /* SAI2_SCK_A */ >> +                 , /* SAI2_SD_A */ >> +                 , /* SAI2_FS_A */ >> +                 ; /* SAI2_MCLK_A */ >> +        }; >> +    }; >> + >> +    sdmmc1_ux_b4_pins_a: sdmmc1-ux-b4-0 { >> +        pins1 { >> +            pinmux = , /* SDMMC1_D0 */ >> +                 , /* SDMMC1_D1 */ >> +                 , /* SDMMC1_D2 */ >> +                 , /* SDMMC1_D3 */ >> +                 ; /* SDMMC1_CMD */ >> +            slew-rate = <1>; >> +            drive-push-pull; >> +            bias-disable; >> +        }; >> +        pins2 { >> +            pinmux = ; /* SDMMC1_CK */ >> +            slew-rate = <2>; >> +            drive-push-pull; >> +            bias-disable; >> +        }; >> +    }; >> + >> +    sdmmc1_ux_b4_od_pins_a: sdmmc1-b4-od-0 { >> +        pins1 { >> +            pinmux = , /* SDMMC1_D0 */ >> +                 , /* SDMMC1_D1 */ >> +                 , /* SDMMC1_D2 */ >> +                 ; /* SDMMC1_D3 */ >> +            slew-rate = <1>; >> +            drive-push-pull; >> +            bias-disable; >> +        }; >> +        pins2 { >> +            pinmux = ; /* SDMMC1_CK */ >> +            slew-rate = <2>; >> +            drive-push-pull; >> +            bias-disable; >> +        }; >> +        pins3 { >> +            pinmux = ; /* SDMMC1_CMD */ >> +            slew-rate = <1>; >> +            drive-open-drain; >> +            bias-disable; >> +        }; >> +    }; >> + >> +    sdmmc1_ux_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { >> +        pins { >> +            pinmux = , /* SDMMC1_D0 */ >> +                 , /* SDMMC1_D1 */ >> +                 , /* SDMMC1_D2 */ >> +                 , /* SDMMC1_D3 */ >> +                 , /* SDMMC1_CK */ >> +                 ; /* SDMMC1_CMD */ >> +        }; >> +    }; >> + >> +    sdmmc2_ux_b4_pins_a: sdmmc2-ux-b4-0 { >> +        pins1 { >> +            pinmux = , /* SDMMC2_D0 */ >> +                , /* SDMMC2_D1 */ >> +                , /* SDMMC2_D2 */ >> +                , /* SDMMC2_D3 */ >> +                ; /* SDMMC2_CMD */ >> +            slew-rate = <1>; >> +            drive-push-pull; >> +            bias-pull-up; >> +        }; >> +        pins2 { >> +            pinmux = ; /* SDMMC2_CK */ >> +            slew-rate = <2>; >> +            drive-push-pull; >> +            bias-pull-up; >> +        }; >> +    }; >> + >> +    sdmmc2_ux_b4_od_pins_a: sdmmc2-ux-b4-od-0 { >> +        pins1 { >> +            pinmux = , /* SDMMC2_D0 */ >> +                , /* SDMMC2_D1 */ >> +                , /* SDMMC2_D2 */ >> +                ; /* SDMMC2_D3 */ >> +            slew-rate = <1>; >> +            drive-push-pull; >> +            bias-pull-up; >> +        }; >> +        pins2 { >> +            pinmux = ; /* SDMMC2_CK */ >> +            slew-rate = <2>; >> +            drive-push-pull; >> +            bias-pull-up; >> +        }; >> +        pins3 { >> +            pinmux = ; /* SDMMC2_CMD */ >> +            slew-rate = <1>; >> +            drive-open-drain; >> +            bias-pull-up; >> +        }; >> +    }; >> + >> +    sdmmc2_ux_b4_sleep_pins_a: sdmmc2-ux-b4-sleep-0 { >> +        pins { >> +            pinmux = , /* SDMMC2_D0 */ >> +                , /* SDMMC2_D1 */ >> +                , /* SDMMC2_D2 */ >> +                , /* SDMMC2_D3 */ >> +                , /* SDMMC2_CK */ >> +                ; /* SDMMC2_CMD */ >> +        }; >> +    }; >> + >> +    sdmmc2_ux_d47_pins_a: sdmmc2-ux-d47-0 { >> +        pins { >> +            pinmux = , /* SDMMC2_D4 */ >> +                , /* SDMMC2_D5 */ >> +                , /* SDMMC2_D6 */ >> +                ; /* SDMMC2_D7 */ >> +            slew-rate = <1>; >> +            drive-push-pull; >> +            bias-pull-up; >> +        }; >> +    }; >> + >> +    sdmmc2_ux_d47_sleep_pins_a: sdmmc2-ux-d47-sleep-0 { >> +        pins { >> +            pinmux = , /* SDMMC2_D4 */ >> +                , /* SDMMC2_D5 */ >> +                , /* SDMMC2_D6 */ >> +                ; /* SDMMC2_D7 */ >> +        }; >> +    }; >> + >> +    uart4_ux_pins_a: uart4-ux-0 { >> +        pins1 { >> +            pinmux = ; /* UART4_TX */ >> +            bias-disable; >> +            drive-push-pull; >> +            slew-rate = <0>; >> +        }; >> +        pins2 { >> +            pinmux = ; /* UART4_RX */ >> +            bias-disable; >> +        }; >> +    }; >> + >> +    uart4_ux_idle_pins_a: uart4-ux-idle-0 { >> +        pins1 { >> +            pinmux = ; /* UART4_TX */ >> +        }; >> +        pins2 { >> +            pinmux = ; /* UART4_RX */ >> +            bias-disable; >> +        }; >> +        }; >> + >> +    uart4_ux_sleep_pins_a: uart4-ux-sleep-0 { >> +        pins { >> +            pinmux = , /* UART4_TX */ >> +                ; /* UART4_RX */ >> +        }; >> +    }; >> + >> +    uart5_ux_pins_a: uart5-0 { >> +        pins1 { >> +            pinmux = ; /* UART5_TX */ >> +            bias-disable; >> +            drive-push-pull; >> +            slew-rate = <0>; >> +        }; >> +        pins2 { >> +            pinmux = ; /* UART5_RX */ >> +            bias-disable; >> +        }; >> +    }; >> + >> +    uart5_ux_idle_pins_a: uart5-idle-0 { >> +        pins1 { >> +            pinmux = ; /* UART5_TX */ >> +        }; >> +        pins2 { >> +            pinmux = ; /* UART5_RX*/ >> +            bias-disable; >> +        }; >> +    }; >> + >> +    uart5_ux_sleep_pins_a: uart5-sleep-0 { >> +        pins { >> +            pinmux = , /* UART5_TX */ >> +                 ; /* UART5_RX */ >> +        }; >> +    }; >> + >> +    uart7_ux_pins_a: uart7-0 { >> +        pins1 { >> +            pinmux = ; /* USART7_TX */ >> +            bias-pull-up; >> +            drive-push-pull; >> +            slew-rate = <0>; >> +        }; >> + >> +        pins2 { >> +            pinmux = ; /* USART7_RX */ >> +            bias-pull-up; >> +        }; >> +        pins3 { >> +            pinmux = ; /* USART7_RTS/DE */ >> +        }; >> +    }; >> + >> +    uart7_ux_idle_pins_a: uart7-idle-0 { >> +        pins1 { >> +            pinmux = , /* USART7_TX */ >> +                 ; /* USART7_RTS/DE */ >> +        }; >> +        pins2 { >> +            pinmux = ; /* USART7_RX */ >> +            bias-disable; >> +        }; >> +    }; >> + >> +    uart7_ux_sleep_pins_a: uart7-sleep-0 { >> +        pins { >> +            pinmux = , /* USART7_TX */ >> +                 , /* USART7_RTS/DE */ >> +                 ; /* USART7_RX */ >> +        }; >> +    }; >> +}; >> + >> +&pinctrl_z { >> + >> +    i2c4_ux_pins_a: i2c4-ux-0 { >> +        pins { >> +            pinmux = , /* I2C4_SCL */ >> +                ; /* I2C4_SDA */ >> +            bias-disable; >> +            drive-open-drain; >> +            slew-rate = <0>; >> +        }; >> +    }; >> + >> +    i2c4_ux_pins_sleep_a: i2c4-1 { >> +        pins { >> +            pinmux = , /* I2C4_SCL */ >> +                ; /* I2C4_SDA */ >> +        }; >> +    }; >> + >> +    spi1_ux_pins_a: spi1-ux-0 { >> +        pins1 { >> +            pinmux = , /* SPI1_SCK */ >> +                ; /* SPI1_MOSI */ >> +            bias-disable; >> +            drive-push-pull; >> +            slew-rate = <1>; >> +        }; >> + >> +        pins2 { >> +            pinmux = ; /* SPI1_MISO */ >> +            bias-disable; >> +        }; >> +    }; >> + >> +    spi1_ux_sleep_pins_a: spi1-ux-sleep-0 { >> +        pins { >> +            pinmux = , /* SPI1_SCK */ >> +                , /* SPI1_MISO */ >> +                ; /* SPI1_MOSI */ >> +        }; >> +    }; >> +}; >> + >> +&pwr_regulators { >> +    vdd-supply = <&vdd>; >> +    vdd_3v3_usbfs-supply = <&vdd_usb>; >> +}; >> + >> +&qspi { >> +    pinctrl-names = "default", "sleep"; >> +    pinctrl-0 = <&qspi_clk_ux_pins_a &qspi_bk1_ux_pins_a>; >> +    pinctrl-1 = <&qspi_clk_ux_sleep_pins_a &qspi_bk1_ux_sleep_pins_a>; >> +    reg = <0x58003000 0x1000>, <0x70000000 0x1000000>; >> +    #address-cells = <1>; >> +    #size-cells = <0>; >> +    status = "okay"; >> + >> +    flash0: flash@0 { >> +        compatible = "jedec,spi-nor"; >> +        reg = <0>; >> +        spi-rx-bus-width = <4>; >> +        spi-max-frequency = <133000000>; >> +        #address-cells = <1>; >> +        #size-cells = <1>; >> +    }; >> +}; >> + >> +&sdmmc1 { >> +    pinctrl-names = "default", "opendrain", "sleep"; >> +    pinctrl-0 = <&sdmmc1_ux_b4_pins_a>; >> +    pinctrl-1 = <&sdmmc1_ux_b4_od_pins_a>; >> +    pinctrl-2 = <&sdmmc1_ux_b4_sleep_pins_a>; >> +    broken-cd; >> +    st,neg-edge; >> +    bus-width = <4>; >> +    vmmc-supply = <&v3v3>; >> +    no-1-8-v; >> +    status = "okay"; >> +}; >> + >> +&sdmmc2 { >> +    pinctrl-names = "default", "opendrain", "sleep"; >> +    pinctrl-0 = <&sdmmc2_ux_b4_pins_a &sdmmc2_ux_d47_pins_a>; >> +    pinctrl-1 = <&sdmmc2_ux_b4_od_pins_a &sdmmc2_ux_d47_pins_a>; >> +    pinctrl-2 = <&sdmmc2_ux_b4_sleep_pins_a >> &sdmmc2_ux_d47_sleep_pins_a>; >> +    non-removable; >> +    no-sd; >> +    no-sdio; >> +    st,neg-edge; >> +    bus-width = <8>; >> +    vmmc-supply = <&v3v3>; >> +    vqmmc-supply = <&v3v3>; >> +    mmc-ddr-3_3v; >> +    status = "okay"; >> +}; >> + >> +&spi1 { >> +    pinctrl-names = "default", "sleep"; >> +    pinctrl-0 = <&spi1_ux_pins_a>; >> +    pinctrl-1 = <&spi1_ux_sleep_pins_a>; >> +    status = "okay"; >> +    cs-gpios = <&gpioi 8 0>, <&gpioi 11 0>, <&gpioz 3 0>; >> + >> +    flash: flash@0 { >> +        #address-cells = <1>; >> +        #size-cells = <1>; >> +        compatible = "jedec,spi-nor"; >> +        spi-max-frequency = <20000000>; >> +        reg = <0>; >> +    }; >> +}; >> + >> +&timers1 { >> +    /* spare dmas for other usage */ >> +    /delete-property/dmas; >> +    /delete-property/dma-names; >> +    status = "okay"; >> + >> +    pwm { >> +        pinctrl-0 = <&pwm1_ux_pins_a>; >> +        pinctrl-1 = <&pwm1_ux_sleep_pins_a>; >> +        pinctrl-names = "default", "sleep"; >> +        status = "okay"; >> +    }; >> + >> +    timer@0 { >> +        status = "okay"; >> +    }; >> +}; >> + >> +&timers4 { >> +    dmas = <&dmamux1 31 0x400 0x5>; >> +    dma-names = "ch3"; >> +    status = "okay"; >> + >> +    pwm4_4: pwm { >> +        pinctrl-0 = <&pwm4_ux_pins_a>; >> +        pinctrl-1 = <&pwm4_ux_sleep_pins_a>; >> +        pinctrl-names = "default", "sleep"; >> +        status = "okay"; >> +    }; >> +}; >> + >> +&timers5 { >> +    /delete-property/dmas; >> +    /delete-property/dma-names; >> +    status = "okay"; >> + >> +    pwm5_4: pwm { >> +        pinctrl-0 = <&pwm5_ux_pins_a>; >> +        pinctrl-1 = <&pwm5_ux_sleep_pins_a>; >> +        pinctrl-names = "default", "sleep"; >> +        status = "okay"; >> +    }; >> + >> +    timer@4 { >> +        status = "okay"; >> +    }; >> +}; >> + >> +&timers17 { >> +    /delete-property/dmas; >> +    /delete-property/dma-names; >> +    status = "okay"; >> + >> +    pwm17_4: pwm { >> +        pinctrl-0 = <&pwm17_ux_pins_a>; >> +        pinctrl-1 = <&pwm17_ux_sleep_pins_a>; >> +        pinctrl-names = "default", "sleep"; >> +        status = "okay"; >> +    }; >> + >> +    timer@16 { >> +        status = "okay"; >> +    }; >> +}; >> + >> +&uart4 { >> +    /delete-property/dmas; >> +    /delete-property/dma-names; >> +    pinctrl-names = "default", "sleep", "idle", "no_console_suspend"; >> +    pinctrl-0 = <&uart4_ux_pins_a>; >> +    pinctrl-1 = <&uart4_ux_sleep_pins_a>; >> +    pinctrl-2 = <&uart4_ux_idle_pins_a>; >> +    pinctrl-3 = <&uart4_ux_pins_a>; >> +    status = "okay"; >> +}; >> + >> +&uart5 { >> +    pinctrl-names = "default", "sleep", "idle"; >> +    pinctrl-0 = <&uart5_ux_pins_a>; >> +    pinctrl-1 = <&uart5_ux_sleep_pins_a>; >> +    pinctrl-2 = <&uart5_ux_idle_pins_a>; >> +    status = "okay"; >> +}; >> + >> +&uart7 { >> +    /delete-property/dmas; >> +    /delete-property/dma-names; >> +    pinctrl-names = "default", "sleep", "idle"; >> +    pinctrl-0 = <&uart7_ux_pins_a>; >> +    pinctrl-1 = <&uart7_ux_sleep_pins_a>; >> +    pinctrl-2 = <&uart7_ux_idle_pins_a>; >> +    status = "okay"; >> +}; >> + >> +&usart1 { >> +    /*Muxing happens in uboot*/ >> +    status = "okay"; >> +}; >> + >> +&usbh_ehci { >> +    phys = <&usbphyc_port0>; >> +    phy-names = "usb"; >> +    status = "okay"; >> +}; >> + >> +&usbh_ohci { >> +    phys = <&usbphyc_port0>; >> +    phy-names = "usb"; >> +    status = "okay"; >> +}; >> + >> +&usbotg_hs { >> +    phys = <&usbphyc_port1 0>; >> +    phy-names = "usb2-phy"; >> +    vbus-supply = <&usb_otg_vbus>; >> +    status = "okay"; >> +}; >> + >> +&usbphyc { >> +    status = "okay"; >> +}; >> + >> +&usbphyc_port0 { >> +    phy-supply = <&vdd_usb>; >> +    st,tune-hs-dc-level = <2>; >> +    st,enable-fs-rftime-tuning; >> +    st,enable-hs-rftime-reduction; >> +    st,trim-hs-current = <15>; >> +    st,trim-hs-impedance = <1>; >> +    st,tune-squelch-level = <3>; >> +    st,tune-hs-rx-offset = <2>; >> +    st,no-lsfs-sc; >> +}; >> + >> +&usbphyc_port1 { >> +    phy-supply = <&vdd_usb>; >> +    st,tune-hs-dc-level = <2>; >> +    st,enable-fs-rftime-tuning; >> +    st,enable-hs-rftime-reduction; >> +    st,trim-hs-current = <15>; >> +    st,trim-hs-impedance = <1>; >> +    st,tune-squelch-level = <3>; >> +    st,tune-hs-rx-offset = <2>; >> +    st,no-lsfs-sc; >> +}; >> + >> +&vrefbuf { >> +    regulator-min-microvolt = <2500000>; >> +    regulator-max-microvolt = <2500000>; >> +    vdda-supply = <&vdd>; >> +    status = "okay"; >> +};