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From: Florian Weimer <fweimer@redhat.com>
To: Olivier Dion <odion@efficios.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
	 Peter Zijlstra <peterz@infradead.org>,
	 "Paul E. McKenney" <paulmck@kernel.org>,
	 Boqun Feng <boqun@kernel.org>,
	 LKML <linux-kernel@vger.kernel.org>,
	 Thomas Gleixner <tglx@kernel.org>,
	 Dmitry Vyukov <dvyukov@google.com>,
	 David Matlack <dmatlack@google.com>,
	 Marco Elver <elver@google.com>,
	 Sean Christopherson <seanjc@google.com>,
	 Wei Liu <wei.liu@kernel.org>,
	Mathias Stearn <mathias@mongodb.com>,
	 Chris Kennelly <ckennelly@google.com>,
	 Blake Oler <blake.oler@mongodb.com>,
	 Rich Felker <dalias@libc.org>,
	 Matthew Wilcox <willy@infradead.org>,
	 Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	 Carlos O'Donell <codonell@redhat.com>
Subject: Re: [RFC PATCH 1/5] rseq: uapi: add rseq operation definitions
Date: Tue, 08 Sep 2026 19:31:50 +0200	[thread overview]
Message-ID: <lhuy0dbd4zd.fsf@oldenburg.str.redhat.com> (raw)
In-Reply-To: <874ifzwx3e.fsf@laura> (Olivier Dion's message of "Tue, 08 Sep 2026 12:01:57 -0400")

* Olivier Dion:

>> Would it be possible to use actual CPU instructions running in userspace
>> for this?  I assume not because it's not possible to restore the
>> register contents.
>
> Well I had in mind another solution, albeit some might find it ugly but
> I think it does have the merit to be explored.
>
> Basically, instead of doing all the operations in the kernel, we could
> setup something akin to a signal handler by pushing a frame on the
> userspace stack and resuming the execution of the thread into that
> "handler".  Userspace is now responsible of everything, including
> returning to the original IP.

On mere context switch (not signal delivery), I don't think the kernel
assumes that there is a valid stack pointer.  These scheme would change
that.  This would be fine for managed code, but this scheme has to work
with arbitrary code that reassigns registers temporarily.

(We had a longjmp on POWER for a while that corrupted the stack pointer
temporarily, and that was visible only upon signal delivery, not regular
context switch.)

> For example, there is a CPU-stride variant of the reset operation.  I
> dabble with this operation to cache a TLS that is global-dynamic into a
> per-cpu cache.  Thus, making a TLS global-dynamic access as fast as a
> TLS initial-exec.

I don't think this can work?  The problem with global-dynamic TLS is
that it can't be a single memory block (it may have to grow).  Even
if the access path changes, we can't relocate the memory because
TLS objects must live in the linear address space.

We can do away with the current complicated scheme in glibc and use an
array of arrays, where the inner arrays follow an exponential growth
policy (for size and alignment).  That would still have dependent loads,
but would be quite a bit faster than our current global-dynamic scheme.

  New TLS allocator for glibc
  <https://conf.gnu-tools-cauldron.org/opo25/talk/LQTU3G/>

(Sadly still not implemented.)

Thanks,
Florian


  reply	other threads:[~2026-09-08 17:32 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28 15:33 [RFC PATCH 0/5] rseq: add support for RSEQ operations odion
2026-08-28 15:33 ` [RFC PATCH 1/5] rseq: uapi: add rseq operation definitions odion
2026-08-29 22:34   ` Dmitry Vyukov
2026-08-29 22:47     ` Dmitry Vyukov
2026-08-31  8:37   ` Florian Weimer
2026-09-08 16:01     ` Olivier Dion
2026-09-08 17:31       ` Florian Weimer [this message]
2026-09-08 22:15         ` Thomas Gleixner
2026-08-28 15:33 ` [RFC PATCH 2/5] rseq: add per-task rseq operation state odion
2026-08-29 22:37   ` Dmitry Vyukov
2026-08-28 15:33 ` [RFC PATCH 3/5] rseq: apply operations on exit to user space odion
2026-08-29 22:42   ` Dmitry Vyukov
2026-08-28 15:33 ` [RFC PATCH 4/5] rseq: register and unregister operations via prctl odion
2026-08-29 22:50   ` Dmitry Vyukov
2026-08-28 15:33 ` [RFC PATCH 5/5] selftests/rseq: add coverage for rseq operations odion
2026-09-08 16:56 ` [RFC PATCH 0/5] rseq: add support for RSEQ operations Thomas Gleixner
2026-09-08 17:38   ` Olivier Dion
2026-09-08 21:29     ` Thomas Gleixner
2026-09-09 14:54       ` Dmitry Vyukov

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