From: "Dmitriy V'jukov" <dvyukov@gmail.com>
To: linux-kernel@vger.kernel.org
Subject: RCU: Number of grace-periods
Date: Wed, 11 Mar 2009 10:58:41 +0000 (UTC) [thread overview]
Message-ID: <loom.20090311T104939-544@post.gmane.org> (raw)
In the article "The design of preemptible read-copy-update":
http://lwn.net/Articles/253651
Paul McKenney explains why number of grace periods before executing callbacks is
set to 2:
#define GP_STAGES 2
There are following statements in the reasoning:
"Note that because rcu_read_lock() does not contain any memory barriers, the
contents of the critical section might be executed early by the CPU"
and:
"However, because rcu_read_unlock() contains no memory barriers, the contents of
the corresponding RCU read-side critical section (possibly including a reference
to the item deleted by CPU 0) can be executed late by CPU 1"
But on some architectures (IA-32, Intel 64, SPARC TSO) acquire and release
fences are implied with every load/store (read - costless), so isn't it possible
to reduce the number of required grace periods before executing callbacks on
these architectures?
I.e. something like:
#ifdef ACQUIRE_RELEASE_FENCES_ARE_IMPLIED_ON_ARCH // defined for x86 etc
#define GP_STAGES 1
#else
#define GP_STAGES 2
#endif
Have someone considered such variant? Is it worth doing?
Thank you.
--
Best regards,
Dmitriy V'jukov
next reply other threads:[~2009-03-11 10:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-11 10:58 Dmitriy V'jukov [this message]
2009-03-11 15:50 ` Paul E. McKenney
2009-03-11 17:50 ` Dmitriy V'jukov
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