From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp.codeaurora.org by pdx-caf-mail.web.codeaurora.org (Dovecot) with LMTP id 0Lp0NJxTGVszHwAAmS7hNA ; Thu, 07 Jun 2018 15:49:47 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id C9E9860590; Thu, 7 Jun 2018 15:49:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham autolearn_force=no version=3.4.0 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by smtp.codeaurora.org (Postfix) with ESMTP id 1C47E6074D; Thu, 7 Jun 2018 15:49:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1C47E6074D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=decadent.org.uk Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935168AbeFGPtZ (ORCPT + 25 others); Thu, 7 Jun 2018 11:49:25 -0400 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:40530 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934383AbeFGOkA (ORCPT ); Thu, 7 Jun 2018 10:40:00 -0400 Received: from [148.252.241.226] (helo=deadeye) by shadbolt.decadent.org.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2) (envelope-from ) id 1fQvbV-0005hK-Sp; Thu, 07 Jun 2018 15:09:30 +0100 Received: from ben by deadeye with local (Exim 4.91) (envelope-from ) id 1fQvbA-0003AZ-UC; Thu, 07 Jun 2018 15:09:08 +0100 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Jan Beulich" , boris.ostrovsky@oracle.com, "Juergen Gross" , xen-devel@lists.xenproject.org, "Thomas Gleixner" Date: Thu, 07 Jun 2018 15:05:21 +0100 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 311/410] x86/xen: Zero MSR_IA32_SPEC_CTRL before suspend In-Reply-To: X-SA-Exim-Connect-IP: 148.252.241.226 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 3.16.57-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Juergen Gross commit 71c208dd54ab971036d83ff6d9837bae4976e623 upstream. Older Xen versions (4.5 and before) might have problems migrating pv guests with MSR_IA32_SPEC_CTRL having a non-zero value. So before suspending zero that MSR and restore it after being resumed. Signed-off-by: Juergen Gross Signed-off-by: Thomas Gleixner Reviewed-by: Jan Beulich Cc: xen-devel@lists.xenproject.org Cc: boris.ostrovsky@oracle.com Link: https://lkml.kernel.org/r/20180226140818.4849-1-jgross@suse.com [bwh: Backported to 3.16: - Include instead of - Adjust context] Signed-off-by: Ben Hutchings --- --- a/arch/x86/xen/suspend.c +++ b/arch/x86/xen/suspend.c @@ -1,10 +1,13 @@ #include #include +#include #include #include #include +#include +#include #include #include #include @@ -12,6 +15,8 @@ #include "xen-ops.h" #include "mmu.h" +static DEFINE_PER_CPU(u64, spec_ctrl); + static void xen_pv_pre_suspend(void) { xen_mm_pin_all(); @@ -84,6 +89,9 @@ static void xen_vcpu_notify_restore(void { unsigned long reason = (unsigned long)data; + if (xen_pv_domain() && boot_cpu_has(X86_FEATURE_SPEC_CTRL)) + wrmsrl(MSR_IA32_SPEC_CTRL, this_cpu_read(spec_ctrl)); + /* Boot processor notified via generic timekeeping_resume() */ if ( smp_processor_id() == 0) return; @@ -93,6 +101,13 @@ static void xen_vcpu_notify_restore(void static void xen_vcpu_notify_suspend(void *data) { + u64 tmp; + + if (xen_pv_domain() && boot_cpu_has(X86_FEATURE_SPEC_CTRL)) { + rdmsrl(MSR_IA32_SPEC_CTRL, tmp); + this_cpu_write(spec_ctrl, tmp); + wrmsrl(MSR_IA32_SPEC_CTRL, 0); + } } void xen_arch_resume(void)