Re: 2.6.19-rc1: x86_64 slowdown in lmbench's fork

[ebiederm@xmission.com (Eric W. Biederman)]

Andi Kleen <ak@suse.de> writes:

>> So unless there is some other array that is sized by NR_IRQs
>> in the context switch path which could account for this in
>> other ways.  It looks like you just got unlucky.
>
>
> TLB/cache profiling data might be useful?
> My bet would be more on cache effects.

The only way I can see that being true is if some irq was keeping
the cache line warm for something in the process startup.

I have trouble seeing how adding 1K to an already 1K data structure
can cause a cache fault that wasn't happening already.
  
>> The only hypothesis that I can seem to come up with is that maybe
>> you are getting an extra tlb now that you didn't use to.  
>> I think the per cpu area is covered by huge pages but maybe not.
>
> It should be.

Which invalidates the tlb fault hypothesis unless it happens to lie
on the 2MB boundary.

Eric