From: ebiederm@xmission.com (Eric W. Biederman)
To: "Peer Chen" <pchen@nvidia.com>
Cc: "peerchen" <peerchen@gmail.com>,
"linux-kernel" <linux-kernel@vger.kernel.org>,
"akpm" <akpm@linux-foundation.org>,
"Andy Currid" <ACurrid@nvidia.com>
Subject: Re: [PATCH] msi: set 'En' bit of MSI Mapping Capability
Date: Thu, 20 Dec 2007 15:48:08 -0700 [thread overview]
Message-ID: <m1d4t17zkn.fsf@ebiederm.dsl.xmission.com> (raw)
In-Reply-To: <15F501D1A78BD343BE8F4D8DB854566B1F24C119@hkemmail01.nvidia.com> (Peer Chen's message of "Thu, 20 Dec 2007 21:43:00 +0800")
"Peer Chen" <pchen@nvidia.com> writes:
> The quirk is for our Intel platform, we don't want HT MSI mapping
> enabled in any of our devices.
Why is this a problem? I seem to recall a real hypertransport bus
downstream of the Intel cpu.
If there is a real hypertransport bus in the middle then what happens
if someone puts a tunnel that uses hypertransport between the two chips?
I feel very dense right now. I don't understand why enabling the
mapping on an Intel based system is a problem. I am afraid there is
some important gap in my understanding in which case we may need to
rethink enabling the hypertransport capability by default.
If disabling the hypertransport bus is simply an optimization, or it
is to deal with an issue that appears exclusive to Nvidia chips
I have no problem with your quirk.
Eric
next prev parent reply other threads:[~2007-12-20 22:48 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-12-18 15:00 peerchen
2007-12-18 21:59 ` Eric W. Biederman
2007-12-20 13:43 ` Peer Chen
2007-12-20 22:48 ` Eric W. Biederman [this message]
2007-12-24 9:10 ` Peer Chen
2007-12-24 11:49 ` Eric W. Biederman
2008-01-02 9:57 ` Peer Chen
2008-01-07 5:32 ` Peer Chen
2008-01-07 9:01 ` Eric W. Biederman
2007-12-20 0:41 ` Andrew Morton
2007-12-20 0:45 ` Andrew Morton
2007-12-20 22:54 ` Eric W. Biederman
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