From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758844AbcIHSJc (ORCPT ); Thu, 8 Sep 2016 14:09:32 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:35772 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758795AbcIHSJ3 (ORCPT ); Thu, 8 Sep 2016 14:09:29 -0400 From: Kevin Hilman To: Jerome Brunet Cc: Linus Walleij , Carlo Caione , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: Re: [PATCH 2/7] pinctrl: amlogic: gxbb: add nand pins Organization: BayLibre References: <1473261223-15412-1-git-send-email-jbrunet@baylibre.com> <1473261223-15412-3-git-send-email-jbrunet@baylibre.com> Date: Thu, 08 Sep 2016 11:09:03 -0700 In-Reply-To: <1473261223-15412-3-git-send-email-jbrunet@baylibre.com> (Jerome Brunet's message of "Wed, 7 Sep 2016 17:13:38 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (darwin) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jerome Brunet writes: > Add EE domains pins for the NAND flash controller. > Even tough we have no driver for the NAND flash controller yet, we need > to have these pins in pinctrl as the actual pin are shared with the spifc > controller. The bootloader on the S905-P200 setup pinmux for the NAND > controller so we need the kernel to properly deactivate this if necessary. > > Signed-off-by: Jerome Brunet Acked-by: Kevin Hilman