From: "James H. Cloos Jr." <cloos@jhcloos.com>
To: Linux Kernel <linux-kernel@vger.kernel.org>
Subject: Re: new CPUID bit
Date: 14 Jan 2003 13:41:01 -0500 [thread overview]
Message-ID: <m38yxn377m.fsf@lugabout.jhcloos.org> (raw)
In-Reply-To: <3E23E04B.2050802@redhat.com>
Ulrich> Northwood P4's have one more bit in the CPUID processor info
Ulrich> set: bit 31. Intel calls the feature PBE (Pending Break
Ulrich> Enable).
For the curious, from <http://www.aceshardware.com/forum?read=80030620>:
Adrian> Bit 31 is PBE (Pending Break Enable) which you can find in the
Adrian> latest P4 instruction manual (document 24547106, page
Adrian> 159-162). To quote:
24547106> Pending Break Enable. The processor supports the use of the
24547106> FERR#/PBE# pin when the processor is in the stop-clock state
24547106> (STPCLK# is asserted) to signal the processor that an
24547106> interrupt is pending and that the processor should return to
24547106> normal operation to handle the interrupt. Bit 10 (PBE
24547106> enable) in the IA32_MISC_ENABLE MSR enables this capability.
-JimC
next prev parent reply other threads:[~2003-01-14 18:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-01-14 10:02 Ulrich Drepper
2003-01-14 18:41 ` James H. Cloos Jr. [this message]
2003-01-15 8:34 ` Mikael Pettersson
2003-01-15 12:18 ` Dave Jones
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