From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S263332AbVGANPv (ORCPT ); Fri, 1 Jul 2005 09:15:51 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S263333AbVGANPv (ORCPT ); Fri, 1 Jul 2005 09:15:51 -0400 Received: from cantor.suse.de ([195.135.220.2]:44266 "EHLO mx1.suse.de") by vger.kernel.org with ESMTP id S263332AbVGANPq (ORCPT ); Fri, 1 Jul 2005 09:15:46 -0400 To: "liyu@WAN" Cc: linux-kernel@vger.kernel.org Subject: Re: one question about pgd allocation References: <42C53E7D.7090404@ccoss.com.cn.suse.lists.linux.kernel> From: Andi Kleen Date: 01 Jul 2005 15:15:43 +0200 In-Reply-To: <42C53E7D.7090404@ccoss.com.cn.suse.lists.linux.kernel> Message-ID: User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.3 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org "liyu@WAN" writes: > > I can not understand this. I search intel developer mannal. but > nothing to help. > Who can tell me why? bit 0 is the present bit which needs to be set on the PGD, otherwise the CPU will ignore it. A clearer way to write this would have been __pgd(__pa(pmd) | _PAGE_PRESENT) -Andi