From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757258Ab1KPRO5 (ORCPT ); Wed, 16 Nov 2011 12:14:57 -0500 Received: from cantor2.suse.de ([195.135.220.15]:40977 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753349Ab1KPRO4 (ORCPT ); Wed, 16 Nov 2011 12:14:56 -0500 Date: Wed, 16 Nov 2011 18:14:55 +0100 Message-ID: From: Takashi Iwai To: Keith Packard Cc: Daniel Mack , Chris Wilson , Jesse Barnes , harald@redhat.com, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/i915: Fix invalid backpanel values for GEN3 or older chips User-Agent: Wanderlust/2.15.6 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.7 Emacs/23.3 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org While refactoring of backlight control code in commit [a95735569: drm/i915: Refactor panel backlight controls], the handling of the bit 0 of duty-cycle was gone except for pineview. This resulted in invalid register values for old chips like 915GM. When the bit 0 is set, the backlight is turned off suddenly. This patch changes the bit-0 check by replacing with the condition of gen < 4 (pineview is included in this condition, too). Reported-and-tested-by: Daniel Mack Cc: Signed-off-by: Takashi Iwai --- drivers/gpu/drm/i915/intel_panel.c | 8 +++----- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 499d4c0..737d00f 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -178,12 +178,10 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev) if (HAS_PCH_SPLIT(dev)) { max >>= 16; } else { - if (IS_PINEVIEW(dev)) { + if (INTEL_INFO(dev)->gen < 4) { max >>= 17; } else { max >>= 16; - if (INTEL_INFO(dev)->gen < 4) - max &= ~1; } if (is_backlight_combination_mode(dev)) @@ -203,7 +201,7 @@ u32 intel_panel_get_backlight(struct drm_device *dev) val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; } else { val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; - if (IS_PINEVIEW(dev)) + if (INTEL_INFO(dev)->gen < 4) val >>= 1; if (is_backlight_combination_mode(dev)) { @@ -246,7 +244,7 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level } tmp = I915_READ(BLC_PWM_CTL); - if (IS_PINEVIEW(dev)) { + if (INTEL_INFO(dev)->gen < 4) { tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); level <<= 1; } else -- 1.7.7