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Date: Tue, 22 Nov 2011 08:30:24 +0100
Message-ID: <s5hr510397z.wl%tiwai@suse.de>
From: Takashi Iwai <tiwai@suse.de>
To: Wu Fengguang <fengguang.wu@intel.com>
Cc: "alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
        LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/3] hda - delayed ELD repoll
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At Mon, 21 Nov 2011 14:48:11 +0800,
Wu Fengguang wrote:
> 
> On Wed, Nov 16, 2011 at 04:29:47PM +0800, Wu, Fengguang wrote:
> > The Intel HDMI chips (ironlake at least) are found to have ~250ms delay
> > between the ELD_Valid=1 hotplug event is send and the ELD buffer becomes
> > actually readable. During the time the ELD buffer is mysteriously all 0.
> > 
> > Fix it by scheduling a delayed work to re-read ELD buffer after 300ms.
> 
> Just FYI.
> 
> Up to now the 300ms looks sufficient. But if ever there comes longer
> delays, I've already prepared a patch for retrying it for several times ;)

Thanks.  I think it's safer to have a repoll mechanism.
But, looking at the patch, one question remains:

> @@ -989,10 +990,9 @@ static void hdmi_present_sense(struct hd
>  	if (eld_valid) {
>  		if (!snd_hdmi_get_eld(eld, codec, pin_nid))
>  			snd_hdmi_show_eld(eld);
> -		else if (retry) {
> +		else if (repoll) {
>  			queue_delayed_work(codec->bus->workq,
> -					   &per_pin->work,
> -					   msecs_to_jiffies(300));
> +					   &per_pin->work, repoll * HZ / 3);

Do you really want to wait longer with a higher repoll number?


Takashi