From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4EACC00449 for ; Mon, 8 Oct 2018 09:36:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 931B42075C for ; Mon, 8 Oct 2018 09:36:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 931B42075C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727433AbeJHQrn (ORCPT ); Mon, 8 Oct 2018 12:47:43 -0400 Received: from mx2.suse.de ([195.135.220.15]:58418 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726330AbeJHQrm (ORCPT ); Mon, 8 Oct 2018 12:47:42 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 8B30BAD85; Mon, 8 Oct 2018 09:36:52 +0000 (UTC) Date: Mon, 08 Oct 2018 11:36:52 +0200 Message-ID: From: Takashi Iwai To: Mark Brown Cc: Sasha Levin , stable@vger.kernel.org, linux-kernel@vger.kernel.org, Yu Zhao , Sasha Levin Subject: Re: [PATCH AUTOSEL 4.18 27/48] sound: enable interrupt after dma buffer initialization In-Reply-To: <20181008093412.GA5684@sirena.org.uk> References: <20181005161424.20521-1-sashal@kernel.org> <20181005161424.20521-27-sashal@kernel.org> <20181008093412.GA5684@sirena.org.uk> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 Emacs/26 (x86_64-suse-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 08 Oct 2018 11:34:12 +0200, Mark Brown wrote: > > On Fri, Oct 05, 2018 at 12:14:03PM -0400, Sasha Levin wrote: > > From: Yu Zhao > > > > [ Upstream commit b61749a89f826eb61fc59794d9e4697bd246eb61 ] > > > > In snd_hdac_bus_init_chip(), we enable interrupt before > > snd_hdac_bus_init_cmd_io() initializing dma buffers. If irq has > > been acquired and irq handler uses the dma buffer, kernel may crash > > when interrupt comes in. > > CCing Takashi who's the maintainer here for review. This is OK to take as a stable. This shouldn't break, at least. thanks, Takashi > > > > Fix the problem by postponing enabling irq after dma buffer > > initialization. And warn once on null dma buffer pointer during the > > initialization. > > > > Reviewed-by: Takashi Iwai > > Signed-off-by: Yu Zhao > > Signed-off-by: Mark Brown > > Signed-off-by: Sasha Levin > > --- > > sound/hda/hdac_controller.c | 8 ++++++-- > > 1 file changed, 6 insertions(+), 2 deletions(-) > > > > diff --git a/sound/hda/hdac_controller.c b/sound/hda/hdac_controller.c > > index 560ec0986e1a..11057d9f84ec 100644 > > --- a/sound/hda/hdac_controller.c > > +++ b/sound/hda/hdac_controller.c > > @@ -40,6 +40,8 @@ static void azx_clear_corbrp(struct hdac_bus *bus) > > */ > > void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus) > > { > > + WARN_ON_ONCE(!bus->rb.area); > > + > > spin_lock_irq(&bus->reg_lock); > > /* CORB set up */ > > bus->corb.addr = bus->rb.addr; > > @@ -479,13 +481,15 @@ bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset) > > /* reset controller */ > > azx_reset(bus, full_reset); > > > > - /* initialize interrupts */ > > + /* clear interrupts */ > > azx_int_clear(bus); > > - azx_int_enable(bus); > > > > /* initialize the codec command I/O */ > > snd_hdac_bus_init_cmd_io(bus); > > > > + /* enable interrupts after CORB/RIRB buffers are initialized above */ > > + azx_int_enable(bus); > > + > > /* program the position buffer */ > > if (bus->use_posbuf && bus->posbuf.addr) { > > snd_hdac_chip_writel(bus, DPLBASE, (u32)bus->posbuf.addr); > > -- > > 2.17.1 > > > [2 signature.asc ] >