From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751850AbdIUE2n (ORCPT ); Thu, 21 Sep 2017 00:28:43 -0400 Received: from smtpbgbr2.qq.com ([54.207.22.56]:44490 "EHLO smtpbgbr2.qq.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751828AbdIUE2l (ORCPT ); Thu, 21 Sep 2017 00:28:41 -0400 X-QQ-GoodBg: 0 X-QQ-SSF: 00100000000000F0 X-QQ-FEAT: GIZYjJ20DPcQd90Fw4vts94GwZ6CQASFCTdm2fj0o9n34ACMuBedl3z4Pr/TO kQV5/QlGWwYk7SRk48tIC19UPZkd3x8fRnjz7rZXG3ytX0KSMqkUNqFzH6BrFhIFRYM/yJy sguOwO+zhZZf36QuPe2ZP8FY/zJJd26KSGDmWMYclCGkYD6i5eR5gqjnXQHKftD6oHNfbZs j1qWaKlnHlkuGfwa7qLb8zgWY58qqezXE9g6qRMSjaGGy3y+maG5IrV9HcyRIBetllbQGrV uF3d+gy6ubJ3jlI6L4auU9ybM= X-QQ-BUSINESS-ORIGIN: 2 X-Originating-IP: 222.92.124.153 X-QQ-STYLE: X-QQ-mid: bizmailfree34t1505968105t5343 From: "=?utf-8?B?6ZmI5Y2O5omN?=" To: "=?utf-8?B?Q2hyaXN0b3BoIEhlbGx3aWc=?=" Cc: "=?utf-8?B?Q2hyaXN0b3BoIEhlbGx3aWc=?=" , "=?utf-8?B?TWFyZWsgU3p5cHJvd3NraQ==?=" , "=?utf-8?B?Um9iaW4gTXVycGh5?=" , "=?utf-8?B?QW5kcmV3IE1vcnRvbg==?=" , "=?utf-8?B?RnV4aW4gWmhhbmc=?=" , "=?utf-8?B?bGludXgta2VybmVs?=" , "=?utf-8?B?SmFtZXMgRSAuIEogLiBCb3R0b21sZXk=?=" , "=?utf-8?B?TWFydGluIEsgLiBQZXRlcnNlbg==?=" , "=?utf-8?B?bGludXgtc2NzaQ==?=" , "=?utf-8?B?c3RhYmxl?=" Subject: Re: [PATCH V6 2/3] dma-mapping: Rework dma_get_cache_alignment()function Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Date: Thu, 21 Sep 2017 12:28:25 +0800 X-Priority: 3 Message-ID: X-QQ-MIME: TCMime 1.0 by Tencent X-Mailer: QQMail 2.x X-QQ-Mailer: QQMail 2.x References: <1505811161-25246-1-git-send-email-chenhc@lemote.com> <1505811161-25246-2-git-send-email-chenhc@lemote.com> <20170919150252.GA23540@lst.de> In-Reply-To: <20170919150252.GA23540@lst.de> X-QQ-ReplyHash: 659848657 X-QQ-SENDSIZE: 520 Feedback-ID: bizmailfree:lemote.com:qybgforeign:qybgforeign2 X-QQ-Bgrelay: 1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id v8L4Smpj028652 Hi, Christoph, I have changed dma_get_cache_alignment's return value, and I don't know whether those drivers want to return ARCH_DMA_MINALIGN unconditionally. So I pass a NULL for those drivers, in order to keep their old behavior. Huacai ------------------ Original ------------------ From: "Christoph Hellwig"; Date: Tue, Sep 19, 2017 11:02 PM To: "Huacai Chen"; Cc: "Christoph Hellwig"; "Marek Szyprowski"; "Robin Murphy"; "Andrew Morton"; "Fuxin Zhang"; "linux-kernel"; "James E . J . Bottomley"; "Martin K . Petersen"; "linux-scsi"; "stable"; Subject: Re: [PATCH V6 2/3] dma-mapping: Rework dma_get_cache_alignment()function > mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * mdev->limits.mtt_seg_size, > - dma_get_cache_alignment()) / mdev->limits.mtt_seg_size; > + dma_get_cache_alignment(NULL)) / mdev->limits.mtt_seg_size; > > mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, Please pass the actually relevant struct device for each call.