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<20240129-use_mmap_hint_address-v1-0-4c74da813ba1@rivosinc.com> <20240129-use_mmap_hint_address-v1-1-4c74da813ba1@rivosinc.com> Autocrypt: addr=cyy@cyyself.name; prefer-encrypt=mutual; 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0mslfht1JyMf5dUi38RQI/fOO0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.3-1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Mon, 2024-01-29 at 18:50 -0800, Charlie Jenkins wrote: > On Tue, Jan 30, 2024 at 10:34:03AM +0800, Yangyu Chen wrote: > >=20 > > > On Jan 30, 2024, at 08:37, Charlie Jenkins > > > wrote: > > >=20 > > > On riscv it is guaranteed that the address returned by mmap is > > > less than > > > the hint address. Allow mmap to return an address all the way up > > > to > > > addr, if provided, rather than just up to the lower address > > > space. > > >=20 > > > This provides a performance benefit as well, allowing mmap to > > > exit after > > > checking that the address is in range rather than searching for a > > > valid > > > address. > > >=20 > > > It is possible to provide an address that uses at most the same > > > number > > > of bits, however it is significantly more computationally > > > expensive to > > > provide that number rather than setting the max to be the hint > > > address. > > > There is the instruction clz/clzw in Zbb that returns the highest > > > set bit > > > which could be used to performantly implement this, but it would > > > still > > > be slower than the current implementation. At worst case, half of > > > the > > > address would not be able to be allocated when a hint address is > > > provided. > > >=20 > > > Signed-off-by: Charlie Jenkins > > > --- > > > arch/riscv/include/asm/processor.h | 21 ++++++++------------- > > > 1 file changed, 8 insertions(+), 13 deletions(-) > > >=20 > > > diff --git a/arch/riscv/include/asm/processor.h > > > b/arch/riscv/include/asm/processor.h > > > index f19f861cda54..f3ea5166e3b2 100644 > > > --- a/arch/riscv/include/asm/processor.h > > > +++ b/arch/riscv/include/asm/processor.h > > > @@ -22,14 +22,11 @@ > > > ({ \ > > > unsigned long mmap_end; \ > > > typeof(addr) _addr =3D (addr); \ > > > - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && > > > is_compat_task())) \ > > > - mmap_end =3D STACK_TOP_MAX; \ > > > - else if ((_addr) >=3D VA_USER_SV57) \ > > > - mmap_end =3D STACK_TOP_MAX; \ > > > - else if ((((_addr) >=3D VA_USER_SV48)) && (VA_BITS >=3D > > > VA_BITS_SV48)) \ > > > - mmap_end =3D VA_USER_SV48; \ > > > + if ((_addr) =3D=3D 0 || \ > > > + (IS_ENABLED(CONFIG_COMPAT) && is_compat_task()) || \ > > > + ((_addr + len) > BIT(VA_BITS - 1))) \ > >=20 > > How about replacing BIT(VA_BITS-1) to DEFAULT_MAP_WINDOW to make > > the code > > more general. > >=20 > > > else \ > > > - mmap_end =3D VA_USER_SV39; \ > > > + mmap_end =3D (_addr + len); \ > > > mmap_end; \ > > > }) > > >=20 > > > @@ -39,14 +36,12 @@ > > > typeof(addr) _addr =3D (addr); \ > > > typeof(base) _base =3D (base); \ > > > unsigned long rnd_gap =3D DEFAULT_MAP_WINDOW - (_base); \ > > > - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && > > > is_compat_task())) \ > > > + if ((_addr) =3D=3D 0 || \ > > > +=C2=A0=C2=A0=C2=A0 (IS_ENABLED(CONFIG_COMPAT) && is_compat_task()) |= | \ > > > +=C2=A0=C2=A0=C2=A0 ((_addr + len) > BIT(VA_BITS - 1))) \ > >=20 > > Same here. > >=20 > > > mmap_base =3D (_base); \ > > > - else if (((_addr) >=3D VA_USER_SV57) && (VA_BITS >=3D > > > VA_BITS_SV57)) \ > > > - mmap_base =3D VA_USER_SV57 - rnd_gap; \ > > > - else if ((((_addr) >=3D VA_USER_SV48)) && (VA_BITS >=3D > > > VA_BITS_SV48)) \ > > > - mmap_base =3D VA_USER_SV48 - rnd_gap; \ > > > else \ > > > - mmap_base =3D VA_USER_SV39 - rnd_gap; \ > > > + mmap_base =3D (_addr + len) - rnd_gap; \ > > > mmap_base; \ > > > }) > > >=20 > > >=20 > >=20 > > What about not setting the upper bound as x86/arm/powerpc as [1] > > did? > > In this case, user space can directly pass a constant hint address > > > > > BIT(47) to get a mapping in sv57. If you want this, this code also > > allows > > user-space to pass any address larger than TASK_SIZE. You should > > also > > limit the mmap_base to (base) + TASK_SIZE - DEFAULT_MAP_WINDOW. >=20 > No. This suggestion causes a random address to be used if the hint > address is not available. That is why I didn't simply go with your > patch. I think return random address is expected and other ISAs like x86/arm/powerpc will also return random address if hint is NULL. Also add CC linux-mm to get more opinions from people who familiar with mm. >=20 > This patch both gives your application the benefit of being able to > use > a hint address in the hopes that the address is available, as well as > continuing to support the guarantee that an address using more bits > than > the hint address is not returned. >=20 > - Charlie >=20 > >=20 > > I=E2=80=99m also aware of the rnd_gap if it is not 0, then we will not = get > > address mapped to VA_USER_SV39 - rnd_gap. > >=20 > > [1]. > > https://lore.kernel.org/linux-riscv/tencent_2683632BEE438C6D4854E30BDF9= CA0843606@qq.com/ > >=20 > > > --=20 > > > 2.43.0 > > >=20 > >=20