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Rozycki" , Jiwei Sun Cc: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Bjorn Helgaas , linux-pci@vger.kernel.org, LKML , helgaas@kernel.org, Lukas Wunner , ahuang12@lenovo.com, sunjw10@lenovo.com, sunjw10@outlook.com References: <20250115134154.9220-1-sjiwei@163.com> <20250115134154.9220-3-sjiwei@163.com> <4df1849e-c56e-b889-8807-437aab637112@linux.intel.com> <417720e7-c793-4c36-a542-a7e937e5a3cf@163.com> Content-Language: en-US From: Jiwei In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 1/18/25 09:03, Maciej W. Rozycki wrote: > On Fri, 17 Jan 2025, Jiwei Sun wrote: > >> However, within this section of code, lnkctl2 is not modified (after >> reading from register on line 111) at all and remains 0x5. This results >> in the condition on line 130 evaluating to 0 (false), which in turn >> prevents the code from line 132 onward from being executed. The removing >> 2.5GT/s downstream link speed restriction work can not be done. > > It seems like a regression from my original code indeed. Sorry, I am confused by this sentence. IIUC, there is no regression regarding the lifting 2.5GT/s restriction in the commit a89c82249c37 ("PCI: Work around PCIe link training failures"). However, since commit de9a6c8d5dbf ("PCI/bwctrl: Add pcie_set_target_speed() to set PCIe Link Speed"), the code to lift the restriction is no longer executed. Therefore, commit de9a6c8d5dbf ("PCI/bwctrl: Add pcie_set_target_speed() to set PCIe Link Speed") can be considered a regression of commit a a89c82249c37 ("PCI: Work around PCIe link training failures"). So, this fix patch(PCI: reread the Link Control 2 Register before using) is required, right? Thanks, Regards, Jiwei > > Maciej