From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755427AbdC3Ilm (ORCPT ); Thu, 30 Mar 2017 04:41:42 -0400 Received: from terminus.zytor.com ([65.50.211.136]:59499 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754322AbdC3Ilk (ORCPT ); Thu, 30 Mar 2017 04:41:40 -0400 Date: Thu, 30 Mar 2017 01:35:52 -0700 From: tip-bot for Suravee Suthikulpanit Message-ID: Cc: suravee.suthikulpanit@amd.com, mingo@kernel.org, vincent.weaver@maine.edu, tglx@linutronix.de, jolsa@redhat.com, torvalds@linux-foundation.org, alexander.shishkin@linux.intel.com, joro@8bytes.org, linux-kernel@vger.kernel.org, acme@redhat.com, peterz@infradead.org, hpa@zytor.com, bp@suse.de, eranian@google.com Reply-To: vincent.weaver@maine.edu, suravee.suthikulpanit@amd.com, mingo@kernel.org, jolsa@redhat.com, tglx@linutronix.de, torvalds@linux-foundation.org, alexander.shishkin@linux.intel.com, linux-kernel@vger.kernel.org, acme@redhat.com, joro@8bytes.org, hpa@zytor.com, peterz@infradead.org, bp@suse.de, eranian@google.com In-Reply-To: <1487926102-13073-5-git-send-email-Suravee.Suthikulpanit@amd.com> References: <1487926102-13073-5-git-send-email-Suravee.Suthikulpanit@amd.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] drivers/iommu/amd: Clean up iommu_pc_get_set_reg() Git-Commit-ID: 0a6d80c70b9150d6a9cf466d41955e374c2c9fab X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 0a6d80c70b9150d6a9cf466d41955e374c2c9fab Gitweb: http://git.kernel.org/tip/0a6d80c70b9150d6a9cf466d41955e374c2c9fab Author: Suravee Suthikulpanit AuthorDate: Fri, 24 Feb 2017 02:48:16 -0600 Committer: Ingo Molnar CommitDate: Thu, 30 Mar 2017 09:53:53 +0200 drivers/iommu/amd: Clean up iommu_pc_get_set_reg() Clean up coding style and fix a bug in the 64-bit register read logic since it overwrites the upper 32-bit when reading the lower 32-bit. Signed-off-by: Suravee Suthikulpanit Signed-off-by: Borislav Petkov Signed-off-by: Peter Zijlstra (Intel) Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Jörg Rödel Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Cc: iommu@lists.linux-foundation.org Link: http://lkml.kernel.org/r/1487926102-13073-5-git-send-email-Suravee.Suthikulpanit@amd.com Signed-off-by: Ingo Molnar --- drivers/iommu/amd_iommu_init.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 6130278..ce65a47 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -2763,22 +2763,25 @@ static int iommu_pc_get_set_reg_val(struct amd_iommu *iommu, if (WARN_ON((fxn > 0x28) || (fxn & 7))) return -ENODEV; - offset = (u32)(((0x40|bank) << 12) | (cntr << 8) | fxn); + offset = (u32)(((0x40 | bank) << 12) | (cntr << 8) | fxn); /* Limit the offset to the hw defined mmio region aperture */ - max_offset_lim = (u32)(((0x40|iommu->max_banks) << 12) | + max_offset_lim = (u32)(((0x40 | iommu->max_banks) << 12) | (iommu->max_counters << 8) | 0x28); if ((offset < MMIO_CNTR_REG_OFFSET) || (offset > max_offset_lim)) return -EINVAL; if (is_write) { - writel((u32)*value, iommu->mmio_base + offset); - writel((*value >> 32), iommu->mmio_base + offset + 4); + u64 val = *value & GENMASK_ULL(47, 0); + + writel((u32)val, iommu->mmio_base + offset); + writel((val >> 32), iommu->mmio_base + offset + 4); } else { *value = readl(iommu->mmio_base + offset + 4); *value <<= 32; - *value = readl(iommu->mmio_base + offset); + *value |= readl(iommu->mmio_base + offset); + *value &= GENMASK_ULL(47, 0); } return 0;