From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751615AbdKYMiy (ORCPT ); Sat, 25 Nov 2017 07:38:54 -0500 Received: from terminus.zytor.com ([65.50.211.136]:37829 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751524AbdKYMiw (ORCPT ); Sat, 25 Nov 2017 07:38:52 -0500 Date: Sat, 25 Nov 2017 04:37:43 -0800 From: tip-bot for Nadav Amit Message-ID: Cc: tglx@linutronix.de, mingo@kernel.org, luto@kernel.org, hpa@zytor.com, linux-kernel@vger.kernel.org, namit@vmware.com Reply-To: mingo@kernel.org, tglx@linutronix.de, hpa@zytor.com, luto@kernel.org, linux-kernel@vger.kernel.org, namit@vmware.com In-Reply-To: <20171125032907.2241-2-namit@vmware.com> References: <20171125032907.2241-2-namit@vmware.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/urgent] x86/tlb: Refactor CR4 setting and shadow write Git-Commit-ID: 0c3292ca8025c5aef44dc389ac3a6bf4a325e0be X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 0c3292ca8025c5aef44dc389ac3a6bf4a325e0be Gitweb: https://git.kernel.org/tip/0c3292ca8025c5aef44dc389ac3a6bf4a325e0be Author: Nadav Amit AuthorDate: Fri, 24 Nov 2017 19:29:06 -0800 Committer: Thomas Gleixner CommitDate: Sat, 25 Nov 2017 13:28:43 +0100 x86/tlb: Refactor CR4 setting and shadow write Refactor the write to CR4 and its shadow value. This is done in preparation for the addition of an assertion to check that IRQs are disabled during CR4 update. No functional change. Signed-off-by: Nadav Amit Signed-off-by: Thomas Gleixner Cc: nadav.amit@gmail.com Cc: Andy Lutomirski Cc: linux-edac@vger.kernel.org Link: https://lkml.kernel.org/r/20171125032907.2241-2-namit@vmware.com --- arch/x86/include/asm/tlbflush.h | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 509046c..e736f7f 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -173,17 +173,20 @@ static inline void cr4_init_shadow(void) this_cpu_write(cpu_tlbstate.cr4, __read_cr4()); } +static inline void __cr4_set(unsigned long cr4) +{ + this_cpu_write(cpu_tlbstate.cr4, cr4); + __write_cr4(cr4); +} + /* Set in this cpu's CR4. */ static inline void cr4_set_bits(unsigned long mask) { unsigned long cr4; cr4 = this_cpu_read(cpu_tlbstate.cr4); - if ((cr4 | mask) != cr4) { - cr4 |= mask; - this_cpu_write(cpu_tlbstate.cr4, cr4); - __write_cr4(cr4); - } + if ((cr4 | mask) != cr4) + __cr4_set(cr4 | mask); } /* Clear in this cpu's CR4. */ @@ -192,11 +195,8 @@ static inline void cr4_clear_bits(unsigned long mask) unsigned long cr4; cr4 = this_cpu_read(cpu_tlbstate.cr4); - if ((cr4 & ~mask) != cr4) { - cr4 &= ~mask; - this_cpu_write(cpu_tlbstate.cr4, cr4); - __write_cr4(cr4); - } + if ((cr4 & ~mask) != cr4) + __cr4_set(cr4 & ~mask); } static inline void cr4_toggle_bits(unsigned long mask) @@ -204,9 +204,7 @@ static inline void cr4_toggle_bits(unsigned long mask) unsigned long cr4; cr4 = this_cpu_read(cpu_tlbstate.cr4); - cr4 ^= mask; - this_cpu_write(cpu_tlbstate.cr4, cr4); - __write_cr4(cr4); + __cr4_set(cr4 ^ mask); } /* Read the CR4 shadow. */