From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754698AbbIOPtj (ORCPT ); Tue, 15 Sep 2015 11:49:39 -0400 Received: from terminus.zytor.com ([198.137.202.10]:57177 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754668AbbIOPtd (ORCPT ); Tue, 15 Sep 2015 11:49:33 -0400 Date: Tue, 15 Sep 2015 08:49:13 -0700 From: tip-bot for Pavel Fedin Message-ID: Cc: hpa@zytor.com, tglx@linutronix.de, stuart.yoder@freescale.com, marc.zyngier@arm.com, p.fedin@samsung.com, linux-kernel@vger.kernel.org, jason@lakedaemon.net, mingo@kernel.org Reply-To: stuart.yoder@freescale.com, p.fedin@samsung.com, marc.zyngier@arm.com, jason@lakedaemon.net, linux-kernel@vger.kernel.org, mingo@kernel.org, hpa@zytor.com, tglx@linutronix.de In-Reply-To: <1442142873-20213-4-git-send-email-marc.zyngier@arm.com> References: <1442142873-20213-4-git-send-email-marc.zyngier@arm.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:irq/urgent] irqchip/GICv2m: Fix GICv2m build warning on 32 bits Git-Commit-ID: 157add60cb35913b8a848a3d7e6456b8ed134796 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 157add60cb35913b8a848a3d7e6456b8ed134796 Gitweb: http://git.kernel.org/tip/157add60cb35913b8a848a3d7e6456b8ed134796 Author: Pavel Fedin AuthorDate: Sun, 13 Sep 2015 12:14:33 +0100 Committer: Thomas Gleixner CommitDate: Tue, 15 Sep 2015 17:06:29 +0200 irqchip/GICv2m: Fix GICv2m build warning on 32 bits After GICv2m was enabled for 32-bit ARM kernel, a warning popped up: drivers/irqchip/irq-gic-v2m.c: In function gicv2m_compose_msi_msg: drivers/irqchip/irq-gic-v2m.c:100:2: warning: right shift count >= width of type [enabled by default] msg->address_hi = (u32) (addr >> 32); ^ This patch fixes it by using proper macros for splitting up the value. Signed-off-by: Pavel Fedin Reviewed-by: Marc Zyngier Signed-off-by: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org Cc: Stuart Yoder Cc: Jason Cooper Link: http://lkml.kernel.org/r/1442142873-20213-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner --- drivers/irqchip/irq-gic-v2m.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index db04fc1..12985da 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -95,8 +95,8 @@ static void gicv2m_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) struct v2m_data *v2m = irq_data_get_irq_chip_data(data); phys_addr_t addr = v2m->res.start + V2M_MSI_SETSPI_NS; - msg->address_hi = (u32) (addr >> 32); - msg->address_lo = (u32) (addr); + msg->address_hi = upper_32_bits(addr); + msg->address_lo = lower_32_bits(addr); msg->data = data->hwirq; }