From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933559AbdLRMC5 (ORCPT ); Mon, 18 Dec 2017 07:02:57 -0500 Received: from terminus.zytor.com ([65.50.211.136]:45335 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933167AbdLRMCy (ORCPT ); Mon, 18 Dec 2017 07:02:54 -0500 Date: Mon, 18 Dec 2017 04:01:42 -0800 From: tip-bot for Yazen Ghannam Message-ID: Cc: mingo@kernel.org, tglx@linutronix.de, bp@suse.de, linux-kernel@vger.kernel.org, yazen.ghannam@amd.com, hpa@zytor.com Reply-To: yazen.ghannam@amd.com, hpa@zytor.com, mingo@kernel.org, tglx@linutronix.de, linux-kernel@vger.kernel.org, bp@suse.de In-Reply-To: <20171212165143.27475-1-Yazen.Ghannam@amd.com> References: <20171212165143.27475-1-Yazen.Ghannam@amd.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:ras/core] x86/MCE: Make correctable error detection look at the Deferred bit Git-Commit-ID: 179eb850ac57c06edaed67fc744ba9d902172f96 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 179eb850ac57c06edaed67fc744ba9d902172f96 Gitweb: https://git.kernel.org/tip/179eb850ac57c06edaed67fc744ba9d902172f96 Author: Yazen Ghannam AuthorDate: Mon, 18 Dec 2017 12:37:14 +0100 Committer: Thomas Gleixner CommitDate: Mon, 18 Dec 2017 12:58:29 +0100 x86/MCE: Make correctable error detection look at the Deferred bit AMD systems may log Deferred errors. These are errors that are uncorrected but which do not need immediate action. The MCA_STATUS[UC] bit may not be set for Deferred errors. Flag the error as not correctable when MCA_STATUS[Deferred] is set and do not feed it into the Correctable Errors Collector. [ bp: Massage commit message. ] Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov Signed-off-by: Thomas Gleixner Link: http://lkml.kernel.org/r/20171212165143.27475-1-Yazen.Ghannam@amd.com --- arch/x86/kernel/cpu/mcheck/mce.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 321c7a80..1b2c114 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -528,6 +528,17 @@ bool mce_is_memory_error(struct mce *m) } EXPORT_SYMBOL_GPL(mce_is_memory_error); +static bool mce_is_correctable(struct mce *m) +{ + if (m->cpuvendor == X86_VENDOR_AMD && m->status & MCI_STATUS_DEFERRED) + return false; + + if (m->status & MCI_STATUS_UC) + return false; + + return true; +} + static bool cec_add_mce(struct mce *m) { if (!m) @@ -535,7 +546,7 @@ static bool cec_add_mce(struct mce *m) /* We eat only correctable DRAM errors with usable addresses. */ if (mce_is_memory_error(m) && - !(m->status & MCI_STATUS_UC) && + mce_is_correctable(m) && mce_usable_address(m)) if (!cec_add_elem(m->addr >> PAGE_SHIFT)) return true;