From: tip-bot for Nick Desaulniers <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: hpa@zytor.com, mingo@kernel.org, ndesaulniers@google.com,
linux-kernel@vger.kernel.org, bpetkov@suse.de,
tglx@linutronix.de
Subject: [tip:x86/pti] x86/process: Define cpu_tss_rw in same section as declaration
Date: Wed, 3 Jan 2018 14:25:40 -0800 [thread overview]
Message-ID: <tip-2fd9c41aea47f4ad071accf94b94f94f2c4d31eb@git.kernel.org> (raw)
In-Reply-To: <20180103203954.183360-1-ndesaulniers@google.com>
Commit-ID: 2fd9c41aea47f4ad071accf94b94f94f2c4d31eb
Gitweb: https://git.kernel.org/tip/2fd9c41aea47f4ad071accf94b94f94f2c4d31eb
Author: Nick Desaulniers <ndesaulniers@google.com>
AuthorDate: Wed, 3 Jan 2018 12:39:52 -0800
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Wed, 3 Jan 2018 23:19:33 +0100
x86/process: Define cpu_tss_rw in same section as declaration
cpu_tss_rw is declared with DECLARE_PER_CPU_PAGE_ALIGNED
but then defined with DEFINE_PER_CPU_SHARED_ALIGNED
leading to section mismatch warnings.
Use DEFINE_PER_CPU_PAGE_ALIGNED consistently. This is necessary because
it's mapped to the cpu entry area and must be page aligned.
[ tglx: Massaged changelog a bit ]
Fixes: 1a935bc3d4ea ("x86/entry: Move SYSENTER_stack to the beginning of struct tss_struct")
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: thomas.lendacky@amd.com
Cc: Borislav Petkov <bpetkov@suse.de>
Cc: tklauser@distanz.ch
Cc: minipli@googlemail.com
Cc: me@kylehuey.com
Cc: namit@vmware.com
Cc: luto@kernel.org
Cc: jpoimboe@redhat.com
Cc: tj@kernel.org
Cc: cl@linux.com
Cc: bp@suse.de
Cc: thgarnie@google.com
Cc: kirill.shutemov@linux.intel.com
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20180103203954.183360-1-ndesaulniers@google.com
---
arch/x86/kernel/process.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 5174159..3cb2486 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -47,7 +47,7 @@
* section. Since TSS's are completely CPU-local, we want them
* on exact cacheline boundaries, to eliminate cacheline ping-pong.
*/
-__visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss_rw) = {
+__visible DEFINE_PER_CPU_PAGE_ALIGNED(struct tss_struct, cpu_tss_rw) = {
.x86_tss = {
/*
* .sp0 is only used when entering ring 0 from a lower
prev parent reply other threads:[~2018-01-03 22:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-02 18:51 correct section for cpu_tss_rw? Nick Desaulniers
2018-01-03 19:27 ` Thomas Gleixner
2018-01-03 20:39 ` [PATCH] x86/process: define cpu_tss_rw in same section as declaration Nick Desaulniers
2018-01-03 22:25 ` tip-bot for Nick Desaulniers [this message]
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