From: tip-bot for Jacob Pan <jacob.jun.pan@intel.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
jacob.jun.pan@intel.com, tglx@linutronix.de
Subject: [tip:x86/mrst] x86, ioapic: Add dummy ioapic functions
Date: Wed, 24 Feb 2010 08:07:19 GMT [thread overview]
Message-ID: <tip-4966e1affb45c5fc402969e10e979407b972a7df@git.kernel.org> (raw)
In-Reply-To: <43F901BD926A4E43B106BF17856F0755A318DA07@orsmsx508.amr.corp.intel.com>
Commit-ID: 4966e1affb45c5fc402969e10e979407b972a7df
Gitweb: http://git.kernel.org/tip/4966e1affb45c5fc402969e10e979407b972a7df
Author: Jacob Pan <jacob.jun.pan@intel.com>
AuthorDate: Tue, 23 Feb 2010 10:43:58 -0800
Committer: H. Peter Anvin <hpa@zytor.com>
CommitDate: Tue, 23 Feb 2010 23:14:07 -0800
x86, ioapic: Add dummy ioapic functions
Some ioapic extern functions are used when CONFIG_X86_IO_APIC is not
defined. We need the dummy functions to avoid a compile time error.
Signed-off-by: Jacob Pan <jacob.jun.pan@intel.com>
LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318DA07@orsmsx508.amr.corp.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
---
arch/x86/include/asm/io_apic.h | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 99a416e..35832a0 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -197,7 +197,11 @@ static const int timer_through_8259 = 0;
static inline void ioapic_init_mappings(void) { }
static inline void ioapic_insert_resources(void) { }
static inline void probe_nr_irqs_gsi(void) { }
+static inline int mp_find_ioapic(int gsi) { return 0; }
+struct io_apic_irq_attr;
+static inline int io_apic_set_pci_routing(struct device *dev, int irq,
+ struct io_apic_irq_attr *irq_attr) { return 0; }
#endif
#endif /* _ASM_X86_IO_APIC_H */
parent reply other threads:[~2010-02-24 8:08 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <43F901BD926A4E43B106BF17856F0755A318DA07@orsmsx508.amr.corp.intel.com>]
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