From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757988AbcIMNd3 (ORCPT ); Tue, 13 Sep 2016 09:33:29 -0400 Received: from terminus.zytor.com ([198.137.202.10]:39412 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756380AbcIMNdX (ORCPT ); Tue, 13 Sep 2016 09:33:23 -0400 Date: Tue, 13 Sep 2016 06:33:06 -0700 From: tip-bot for Yazen Ghannam Message-ID: Cc: mingo@kernel.org, Yazen.Ghannam@amd.com, linux-kernel@vger.kernel.org, tglx@linutronix.de, hpa@zytor.com, bp@suse.de Reply-To: mingo@kernel.org, hpa@zytor.com, bp@suse.de, tglx@linutronix.de, Yazen.Ghannam@amd.com, linux-kernel@vger.kernel.org In-Reply-To: <1473275643-1721-1-git-send-email-Yazen.Ghannam@amd.com> References: <1473275643-1721-1-git-send-email-Yazen.Ghannam@amd.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:ras/core] x86/mce/AMD: Extract the error address on SMCA systems Git-Commit-ID: 4f29b73bae158e3635b8f289f77376b054904ef5 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 4f29b73bae158e3635b8f289f77376b054904ef5 Gitweb: http://git.kernel.org/tip/4f29b73bae158e3635b8f289f77376b054904ef5 Author: Yazen Ghannam AuthorDate: Mon, 12 Sep 2016 09:59:39 +0200 Committer: Thomas Gleixner CommitDate: Tue, 13 Sep 2016 15:23:13 +0200 x86/mce/AMD: Extract the error address on SMCA systems The MCA_ADDR registers on Scalable MCA systems contain the ErrorAddr in bits [55:0] and the least significant bit of the address in bits [61:56]. We should extract the valid ErrorAddr bits from the MCA_ADDR register rather than saving the raw value to struct mce. Signed-off-by: Yazen Ghannam Signed-off-by: Borislav Petkov Link: http://lkml.kernel.org/r/1473275643-1721-1-git-send-email-Yazen.Ghannam@amd.com Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/mcheck/mce.c | 10 ++++++++++ arch/x86/kernel/cpu/mcheck/mce_amd.c | 13 ++++++++++++- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 7d905e3..a7fdf45 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -588,6 +588,16 @@ static void mce_read_aux(struct mce *m, int i) m->addr >>= shift; m->addr <<= shift; } + + /* + * Extract [55:] where lsb is the least significant + * *valid* bit of the address bits. + */ + if (mce_flags.smca) { + u8 lsb = (m->addr >> 56) & 0x3f; + + m->addr &= GENMASK_ULL(55, lsb); + } } if (mce_flags.smca) { diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index d2f92ab..9b54034 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c @@ -561,9 +561,20 @@ __log_error(unsigned int bank, bool deferred_err, bool threshold_err, u64 misc) if (threshold_err) m.misc = misc; - if (m.status & MCI_STATUS_ADDRV) + if (m.status & MCI_STATUS_ADDRV) { rdmsrl(msr_addr, m.addr); + /* + * Extract [55:] where lsb is the least significant + * *valid* bit of the address bits. + */ + if (mce_flags.smca) { + u8 lsb = (m.addr >> 56) & 0x3f; + + m.addr &= GENMASK_ULL(55, lsb); + } + } + if (mce_flags.smca) { rdmsrl(MSR_AMD64_SMCA_MCx_IPID(bank), m.ipid);