From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932124AbbGFPqw (ORCPT ); Mon, 6 Jul 2015 11:46:52 -0400 Received: from terminus.zytor.com ([198.137.202.10]:49575 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755832AbbGFPqq (ORCPT ); Mon, 6 Jul 2015 11:46:46 -0400 Date: Mon, 6 Jul 2015 08:45:48 -0700 From: tip-bot for George Spelvin Message-ID: Cc: luto@amacapital.net, bp@suse.de, hpa@zytor.com, mingo@kernel.org, brgerst@gmail.com, dvlasenk@redhat.com, bp@alien8.de, linux-kernel@vger.kernel.org, peterz@infradead.org, tglx@linutronix.de, torvalds@linux-foundation.org, linux@horizon.com Reply-To: brgerst@gmail.com, mingo@kernel.org, hpa@zytor.com, bp@suse.de, luto@amacapital.net, linux@horizon.com, tglx@linutronix.de, linux-kernel@vger.kernel.org, peterz@infradead.org, torvalds@linux-foundation.org, bp@alien8.de, dvlasenk@redhat.com In-Reply-To: <20150618075906.4615.qmail@ns.horizon.com> References: <20150618075906.4615.qmail@ns.horizon.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/asm] x86/asm/tsc: Save an instruction in DECLARE_ARGS users Git-Commit-ID: 5a33fcb8d991209bac0a266ab499e4b53d116cdd X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 5a33fcb8d991209bac0a266ab499e4b53d116cdd Gitweb: http://git.kernel.org/tip/5a33fcb8d991209bac0a266ab499e4b53d116cdd Author: George Spelvin AuthorDate: Thu, 25 Jun 2015 18:44:13 +0200 Committer: Ingo Molnar CommitDate: Mon, 6 Jul 2015 15:23:30 +0200 x86/asm/tsc: Save an instruction in DECLARE_ARGS users Before, the code to do RDTSC looked like: rdtsc shl $0x20, %rdx mov %eax, %eax or %rdx, %rax The "mov %eax, %eax" is required to clear the high 32 bits of RAX. By declaring low and high as 64-bit variables, the code is simplified to: rdtsc shl $0x20,%rdx or %rdx,%rax Yes, it's a 2-byte instruction that's not on a critical path, but there are principles to be upheld. Every user of EAX_EDX_RET has been checked. I tried to check users of EAX_EDX_ARGS, but there weren't any, so I deleted it to be safe. ( There's no benefit to making "high" 64 bits, but it was the simplest way to proceed. ) Signed-off-by: George Spelvin Signed-off-by: Borislav Petkov Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: jacob.jun.pan@linux.intel.com Link: http://lkml.kernel.org/r/20150618075906.4615.qmail@ns.horizon.com Signed-off-by: Ingo Molnar --- arch/x86/include/asm/msr.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 02bdd6c..131eec2 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -47,14 +47,13 @@ static inline unsigned long long native_read_tscp(unsigned int *aux) * it means rax *or* rdx. */ #ifdef CONFIG_X86_64 -#define DECLARE_ARGS(val, low, high) unsigned low, high -#define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32)) -#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high) +/* Using 64-bit values saves one instruction clearing the high half of low */ +#define DECLARE_ARGS(val, low, high) unsigned long low, high +#define EAX_EDX_VAL(val, low, high) ((low) | (high) << 32) #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) #else #define DECLARE_ARGS(val, low, high) unsigned long long val #define EAX_EDX_VAL(val, low, high) (val) -#define EAX_EDX_ARGS(val, low, high) "A" (val) #define EAX_EDX_RET(val, low, high) "=A" (val) #endif