From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753277AbbJTJdL (ORCPT ); Tue, 20 Oct 2015 05:33:11 -0400 Received: from terminus.zytor.com ([198.137.202.10]:49711 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752775AbbJTJdI (ORCPT ); Tue, 20 Oct 2015 05:33:08 -0400 Date: Tue, 20 Oct 2015 02:32:23 -0700 From: tip-bot for Will Deacon Message-ID: Cc: akpm@linux-foundation.org, dbueso@suse.de, peterz@infradead.org, tglx@linutronix.de, will.deacon@arm.com, mingo@kernel.org, torvalds@linux-foundation.org, hpa@zytor.com, linux-kernel@vger.kernel.org, paulmck@linux.vnet.ibm.com Reply-To: paulmck@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, mingo@kernel.org, torvalds@linux-foundation.org, hpa@zytor.com, akpm@linux-foundation.org, dbueso@suse.de, peterz@infradead.org, will.deacon@arm.com, tglx@linutronix.de In-Reply-To: <1444227038-12533-1-git-send-email-will.deacon@arm.com> References: <1444227038-12533-1-git-send-email-will.deacon@arm.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:locking/core] ARM, locking/atomics: Implement _relaxed variants of atomic[64]_{inc,dec} Git-Commit-ID: 6e490b0106a2118ee4c37c37847454a5c2dc6e32 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 6e490b0106a2118ee4c37c37847454a5c2dc6e32 Gitweb: http://git.kernel.org/tip/6e490b0106a2118ee4c37c37847454a5c2dc6e32 Author: Will Deacon AuthorDate: Wed, 7 Oct 2015 15:10:38 +0100 Committer: Ingo Molnar CommitDate: Tue, 20 Oct 2015 10:17:23 +0200 ARM, locking/atomics: Implement _relaxed variants of atomic[64]_{inc,dec} Now that the core code supports acquire/release/relaxed versions of the atomic_inc family, implement only the _relaxed flavours in the ARM backend so that we get all of the others for free. Signed-off-by: Will Deacon Signed-off-by: Peter Zijlstra (Intel) Acked-by: Davidlohr Bueso Cc: Andrew Morton Cc: Linus Torvalds Cc: Paul E. McKenney Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1444227038-12533-1-git-send-email-will.deacon@arm.com Signed-off-by: Ingo Molnar --- arch/arm/include/asm/atomic.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h index 2bf80af..9e10c45 100644 --- a/arch/arm/include/asm/atomic.h +++ b/arch/arm/include/asm/atomic.h @@ -210,8 +210,8 @@ ATOMIC_OP(xor, ^=, eor) #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) -#define atomic_inc_return(v) (atomic_add_return(1, v)) -#define atomic_dec_return(v) (atomic_sub_return(1, v)) +#define atomic_inc_return_relaxed(v) (atomic_add_return_relaxed(1, v)) +#define atomic_dec_return_relaxed(v) (atomic_sub_return_relaxed(1, v)) #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) #define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0) @@ -442,11 +442,11 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) #define atomic64_inc(v) atomic64_add(1LL, (v)) -#define atomic64_inc_return(v) atomic64_add_return(1LL, (v)) +#define atomic64_inc_return_relaxed(v) atomic64_add_return_relaxed(1LL, (v)) #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) #define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0) #define atomic64_dec(v) atomic64_sub(1LL, (v)) -#define atomic64_dec_return(v) atomic64_sub_return(1LL, (v)) +#define atomic64_dec_return_relaxed(v) atomic64_sub_return_relaxed(1LL, (v)) #define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)