From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1424701AbcFHLCl (ORCPT ); Wed, 8 Jun 2016 07:02:41 -0400 Received: from terminus.zytor.com ([198.137.202.10]:57798 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932121AbcFHLCi (ORCPT ); Wed, 8 Jun 2016 07:02:38 -0400 Date: Wed, 8 Jun 2016 04:01:23 -0700 From: tip-bot for Dave Hansen Message-ID: Cc: jolsa@redhat.com, peterz@infradead.org, brgerst@gmail.com, alexander.shishkin@linux.intel.com, hpa@zytor.com, tglx@linutronix.de, dave@sr71.net, luto@amacapital.net, linux-kernel@vger.kernel.org, vincent.weaver@maine.edu, dave.hansen@linux.intel.com, srinivas.pandruvada@linux.intel.com, mingo@kernel.org, eranian@google.com, bp@alien8.de, acme@redhat.com, dvlasenk@redhat.com, torvalds@linux-foundation.org Reply-To: acme@redhat.com, torvalds@linux-foundation.org, dvlasenk@redhat.com, dave.hansen@linux.intel.com, bp@alien8.de, eranian@google.com, mingo@kernel.org, srinivas.pandruvada@linux.intel.com, linux-kernel@vger.kernel.org, luto@amacapital.net, dave@sr71.net, vincent.weaver@maine.edu, brgerst@gmail.com, peterz@infradead.org, jolsa@redhat.com, tglx@linutronix.de, hpa@zytor.com, alexander.shishkin@linux.intel.com In-Reply-To: <20160603001930.6AC50BE3@viggo.jf.intel.com> References: <20160603001930.6AC50BE3@viggo.jf.intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/rapl: Use Intel family macros for RAPL Git-Commit-ID: 7f2236d0bf9a33bb539551b653ae842430654240 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 7f2236d0bf9a33bb539551b653ae842430654240 Gitweb: http://git.kernel.org/tip/7f2236d0bf9a33bb539551b653ae842430654240 Author: Dave Hansen AuthorDate: Thu, 2 Jun 2016 17:19:30 -0700 Committer: Ingo Molnar CommitDate: Wed, 8 Jun 2016 12:05:58 +0200 perf/x86/rapl: Use Intel family macros for RAPL Use the new INTEL_FAM6_* macros for rapl.c. Note that this is missing at least one Westmere model and Skylake Server which will we fixed later in this series. The resulting binary structure 'rapl_cpu_match' is the same before and after this patch. Signed-off-by: Dave Hansen Cc: Alexander Shishkin Cc: Andy Lutomirski Cc: Arnaldo Carvalho de Melo Cc: Borislav Petkov Cc: Brian Gerst Cc: Dave Hansen Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Srinivas Pandruvada Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Cc: jacob.jun.pan@intel.com Link: http://lkml.kernel.org/r/20160603001930.6AC50BE3@viggo.jf.intel.com Signed-off-by: Ingo Molnar --- arch/x86/events/intel/rapl.c | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c index e30eef4..8012fe6 100644 --- a/arch/x86/events/intel/rapl.c +++ b/arch/x86/events/intel/rapl.c @@ -55,6 +55,7 @@ #include #include #include +#include #include "../perf_event.h" MODULE_LICENSE("GPL"); @@ -786,26 +787,26 @@ static const struct intel_rapl_init_fun skl_rapl_init __initconst = { }; static const struct x86_cpu_id rapl_cpu_match[] __initconst = { - X86_RAPL_MODEL_MATCH(42, snb_rapl_init), /* Sandy Bridge */ - X86_RAPL_MODEL_MATCH(45, snbep_rapl_init), /* Sandy Bridge-EP */ + X86_RAPL_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE, snb_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE_X, snbep_rapl_init), - X86_RAPL_MODEL_MATCH(58, snb_rapl_init), /* Ivy Bridge */ - X86_RAPL_MODEL_MATCH(62, snbep_rapl_init), /* IvyTown */ + X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE, snb_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X, snbep_rapl_init), - X86_RAPL_MODEL_MATCH(60, hsw_rapl_init), /* Haswell */ - X86_RAPL_MODEL_MATCH(63, hsx_rapl_init), /* Haswell-Server */ - X86_RAPL_MODEL_MATCH(69, hsw_rapl_init), /* Haswell-Celeron */ - X86_RAPL_MODEL_MATCH(70, hsw_rapl_init), /* Haswell GT3e */ + X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_CORE, hsw_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_X, hsw_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_ULT, hsw_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_GT3E, hsw_rapl_init), - X86_RAPL_MODEL_MATCH(61, hsw_rapl_init), /* Broadwell */ - X86_RAPL_MODEL_MATCH(71, hsw_rapl_init), /* Broadwell-H */ - X86_RAPL_MODEL_MATCH(79, hsx_rapl_init), /* Broadwell-Server */ - X86_RAPL_MODEL_MATCH(86, hsx_rapl_init), /* Broadwell Xeon D */ + X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_CORE, hsw_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_GT3E, hsw_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_X, hsw_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D, hsw_rapl_init), - X86_RAPL_MODEL_MATCH(87, knl_rapl_init), /* Knights Landing */ + X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, knl_rapl_init), - X86_RAPL_MODEL_MATCH(78, skl_rapl_init), /* Skylake */ - X86_RAPL_MODEL_MATCH(94, skl_rapl_init), /* Skylake H/S */ + X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, skl_rapl_init), + X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_DESKTOP, skl_rapl_init), {}, };