From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752353AbbDBSpk (ORCPT ); Thu, 2 Apr 2015 14:45:40 -0400 Received: from terminus.zytor.com ([198.137.202.10]:37297 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751054AbbDBSpg (ORCPT ); Thu, 2 Apr 2015 14:45:36 -0400 Date: Thu, 2 Apr 2015 11:45:06 -0700 From: tip-bot for Andi Kleen Message-ID: Cc: mingo@kernel.org, ak@linux.intel.com, linux-kernel@vger.kernel.org, hpa@zytor.com, peterz@infradead.org, tglx@linutronix.de Reply-To: linux-kernel@vger.kernel.org, ak@linux.intel.com, mingo@kernel.org, tglx@linutronix.de, peterz@infradead.org, hpa@zytor.com In-Reply-To: <1425059312-18217-2-git-send-email-andi@firstfloor.org> References: <1425059312-18217-2-git-send-email-andi@firstfloor.org> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/intel: Reset more state in PMU reset Git-Commit-ID: 8882edf735738c949aba4b65d3ec3453066bab12 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 8882edf735738c949aba4b65d3ec3453066bab12 Gitweb: http://git.kernel.org/tip/8882edf735738c949aba4b65d3ec3453066bab12 Author: Andi Kleen AuthorDate: Fri, 27 Feb 2015 09:48:30 -0800 Committer: Ingo Molnar CommitDate: Thu, 2 Apr 2015 17:33:16 +0200 perf/x86/intel: Reset more state in PMU reset The PMU reset code didn't quite keep up with newer PMU features. Improve it a bit to really reset a modern PMU: - Clear all overflow status - Clear LBRs and freezing state - Disable fixed counters too Signed-off-by: Andi Kleen Signed-off-by: Peter Zijlstra (Intel) Cc: eranian@google.com Link: http://lkml.kernel.org/r/1425059312-18217-2-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_intel.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 6ea61a5..5999460 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1538,6 +1538,18 @@ static void intel_pmu_reset(void) if (ds) ds->bts_index = ds->bts_buffer_base; + /* Ack all overflows and disable fixed counters */ + if (x86_pmu.version >= 2) { + intel_pmu_ack_status(intel_pmu_get_status()); + wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0); + } + + /* Reset LBRs and LBR freezing */ + if (x86_pmu.lbr_nr) { + update_debugctlmsr(get_debugctlmsr() & + ~(DEBUGCTLMSR_FREEZE_LBRS_ON_PMI|DEBUGCTLMSR_LBR)); + } + local_irq_restore(flags); }