From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932978AbbHDJBL (ORCPT ); Tue, 4 Aug 2015 05:01:11 -0400 Received: from terminus.zytor.com ([198.137.202.10]:50278 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932448AbbHDJBH (ORCPT ); Tue, 4 Aug 2015 05:01:07 -0400 Date: Tue, 4 Aug 2015 02:00:32 -0700 From: tip-bot for Andi Kleen Message-ID: Cc: mingo@kernel.org, hpa@zytor.com, torvalds@linux-foundation.org, peterz@infradead.org, ak@linux.intel.com, tglx@linutronix.de, linux-kernel@vger.kernel.org Reply-To: tglx@linutronix.de, linux-kernel@vger.kernel.org, ak@linux.intel.com, peterz@infradead.org, torvalds@linux-foundation.org, hpa@zytor.com, mingo@kernel.org In-Reply-To: <1435707205-6676-3-git-send-email-andi@firstfloor.org> References: <1435707205-6676-3-git-send-email-andi@firstfloor.org> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf/x86/intel: Use 0x11 as extra reg test value Git-Commit-ID: 8c4fe7095d633dd5543690ea5c3d522c5cd989b6 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit-ID: 8c4fe7095d633dd5543690ea5c3d522c5cd989b6 Gitweb: http://git.kernel.org/tip/8c4fe7095d633dd5543690ea5c3d522c5cd989b6 Author: Andi Kleen AuthorDate: Tue, 30 Jun 2015 16:33:24 -0700 Committer: Ingo Molnar CommitDate: Tue, 4 Aug 2015 10:16:59 +0200 perf/x86/intel: Use 0x11 as extra reg test value The next patch adds a new perf extra register where 0x1ff is not a valid value. Use 0x11 instead. Signed-off-by: Andi Kleen Signed-off-by: Peter Zijlstra (Intel) Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1435707205-6676-3-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/perf_event_intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 28fc272..a478e3c 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -3579,7 +3579,7 @@ __init int intel_pmu_init(void) */ if (x86_pmu.extra_regs) { for (er = x86_pmu.extra_regs; er->msr; er++) { - er->extra_msr_access = check_msr(er->msr, 0x1ffUL); + er->extra_msr_access = check_msr(er->msr, 0x11UL); /* Disable LBR select mapping */ if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access) x86_pmu.lbr_sel_map = NULL;